awokd@danwin1210.me has uploaded this change for review.

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[WIP] vc/amd/agesa/f16kb/Proc/GNB: Fix out-of-bounds read

Incorrect values read from a different memory region will cause
incorrect computations. VceFlags array size should be 4 based on
similar code in f15 branch, and because
f16kb/Proc/GNB/Modules/GnbInitKB/GnbF1TableKB.c only loads
4 values for VceFlags in DefaultPpF1ArrayKB. Leaving it at 5
creates Coverity CID 1241878.

Change-Id: I0242c0634e66616018e6df04ac6f1505b82a630f
Signed-off-by: Joe Moore <awokd@danwin1210.me>
Found-by: Coverity CID 1241878
---
M src/vendorcode/amd/agesa/f16kb/Proc/GNB/Common/GnbF1Table.h
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/38056/1
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Common/GnbF1Table.h b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Common/GnbF1Table.h
index add5509..90df07c 100644
--- a/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Common/GnbF1Table.h
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Common/GnbF1Table.h
@@ -66,7 +66,7 @@
UINT32 PP_FUSE_ARRAY_V2_fld11;
UINT32 PP_FUSE_ARRAY_V2_fld12;
BOOLEAN PP_FUSE_ARRAY_V2_fld13;
- UINT8 VceFlags[5]; ///< VCE Flags
+ UINT8 VceFlags[4]; ///< VCE Flags
UINT8 VceMclk; ///< MCLK for VCE
UINT8 PP_FUSE_ARRAY_V2_fld16[4];
UINT8 EclkDid[5]; ///< Eclk DID

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I0242c0634e66616018e6df04ac6f1505b82a630f
Gerrit-Change-Number: 38056
Gerrit-PatchSet: 1
Gerrit-Owner: awokd@danwin1210.me
Gerrit-MessageType: newchange