Subrata Banik merged this change.

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Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Aamir Bohra: Looks good to me, approved Ronak Kanabar: Looks good to me, but someone else must approve
soc/intel/icelake: Make correct C-state entries for S0ix and non-S0ix

TEST=Dump SSDT entries to verify _CST between S0ix enable and disable.
>> iasl -d SSDT # to generate SSDT.dsl

Change-Id: I82d8bf9d143263a80a544f6e11186a3bc9c41052
Signed-off-by: Subrata Banik <>
Tested-by: build bot (Jenkins) <>
Reviewed-by: Ronak Kanabar <>
Reviewed-by: Aamir Bohra <>
Reviewed-by: Paul Menzel <>
M src/soc/intel/icelake/acpi.c
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/soc/intel/icelake/acpi.c b/src/soc/intel/icelake/acpi.c
index 39ec58a..0e13d034 100644
--- a/src/soc/intel/icelake/acpi.c
+++ b/src/soc/intel/icelake/acpi.c
@@ -119,13 +119,13 @@

-static int cstate_set_s0ix[] = {
+static int cstate_set_non_s0ix[] = {

-static int cstate_set_non_s0ix[] = {
+static int cstate_set_s0ix[] = {

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I82d8bf9d143263a80a544f6e11186a3bc9c41052
Gerrit-Change-Number: 31153
Gerrit-PatchSet: 3
Gerrit-Owner: Subrata Banik <>
Gerrit-Reviewer: Aamir Bohra <>
Gerrit-Reviewer: Duncan Laurie <>
Gerrit-Reviewer: Furquan Shaikh <>
Gerrit-Reviewer: Patrick Rudolph <>
Gerrit-Reviewer: Paul Menzel <>
Gerrit-Reviewer: Ronak Kanabar <>
Gerrit-Reviewer: Shelley Chen <>
Gerrit-Reviewer: Subrata Banik <>
Gerrit-Reviewer: build bot (Jenkins) <>
Gerrit-MessageType: merged