Attention is currently required from: Philipp Hug, ron minnich.
Alper Nebi Yasak has uploaded this change for review.
mainboard/qemu-riscv: Move DRAM resource setup to read_resources
A previous commit adds PCI support to the qemu-riscv mainboard code, in
part by adding a read_resources() function. Move its DRAM resource setup
there and use cbmem_top() to get top of memory, similar to qemu-aarch64.
Change-Id: Ic171cb7e22d9da2df18a9d171a5ab89c2cd3298b
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
M src/mainboard/emulation/qemu-riscv/mainboard.c
1 file changed, 3 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/80379/1
diff --git a/src/mainboard/emulation/qemu-riscv/mainboard.c b/src/mainboard/emulation/qemu-riscv/mainboard.c
index 2e07781..327336e 100644
--- a/src/mainboard/emulation/qemu-riscv/mainboard.c
+++ b/src/mainboard/emulation/qemu-riscv/mainboard.c
@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <cbmem.h>
#include <console/console.h>
#include <device/device.h>
#include <symbols.h>
@@ -8,14 +9,6 @@
static void mainboard_enable(struct device *dev)
{
- size_t dram_mb_detected;
-
- if (!dev) {
- die("No dev0; die\n");
- }
-
- dram_mb_detected = probe_ramsize((uintptr_t)_dram, CONFIG_DRAM_SIZE_MB);
- ram_range(dev, 0, (uintptr_t)_dram, dram_mb_detected * MiB);
}
struct chip_operations mainboard_ops = {
@@ -45,6 +38,8 @@
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED;
mmio_range(dev, index++, QEMU_VIRT_PCIE_ECAM_BASE, QEMU_VIRT_PCIE_ECAM_SIZE);
+
+ ram_from_to(dev, index++, (uintptr_t)_dram, (uintptr_t)cbmem_top());
}
struct device_operations qemu_riscv_pci_domain_ops = {
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