Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Nico Huber, Shuo Liu, Tim Chu.
Patrick Rudolph uploaded patch set #11 to this change.
The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins)
soc/intel/xeon_sp: Locate PCU by PCI device ID
Instead of manually crafting B:D:F numbers (missing the PCI segment
group) for each PCI device search for the devices by PCI
vendor and device ID.
This adds PCI multi-segment support without any further code
modifications, since the correct PCI segment is stored in the
devicetree.
Intel Document-ID: 612246
Tested: On SPR 4S all PCU on all 4 sockets could be found and locked.
Change-Id: I06694715cba76b101165f1cef66d161b0f896b26
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
---
M src/soc/intel/xeon_sp/cpx/chip.c
M src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h
M src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h
M src/soc/intel/xeon_sp/skx/soc_util.c
M src/soc/intel/xeon_sp/spr/chip.c
M src/soc/intel/xeon_sp/spr/include/soc/pci_devs.h
6 files changed, 107 insertions(+), 90 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/80093/11
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