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3 comments:

• File src/northbridge/intel/sandybridge/early_init.c:

  • Patch Set #2, Line 71: pci_write_config32(PCI_DEV(0, 0x00, 0), EPBAR + 4, EP_BASE_ADDRESS >> 32);

    line over 80 characters

  • Patch Set #2, Line 73: pci_write_config32(PCI_DEV(0, 0x00, 0), MCHBAR + 4, MCH_BASE_ADDRESS >> 32);

    line over 80 characters

  • Patch Set #2, Line 75: pci_write_config32(PCI_DEV(0, 0x00, 0), DMIBAR + 4, DMI_BASE_ADDRESS >> 32);

    line over 80 characters

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