> @Nate, the confusion is that, we understood that FSP and Coreboot will use the same stack hence we have given stackbase and size to FSP with same as CB is using. You could see CB on CML, ICL with single stack implementation is passing ~128KB stack size which might be huge for coreboot expectation and just to satisfy the FSP-M need. Till this part it was okay.
I don't think FSP needs to be passed in stack information since it is sharing the stack with coreboot. The only thing that is required is that the stack be large enough to avoid overflow. This should be part of integration guide and implemented accordingly in coreboot.
But the question comes, what FSP is storing at very end of stack (like stack base), is that some memory FSP is allocating for Hob?
Like mentioned in one of the above comments, the name "StackBase" and "StackSize" which were retained for backward compatibility is the cause of confusion here. Though they have Stack in the name, the region being passed in is not really used for stack by FSP. Instead, FSP is expecting a temporary space for holding HOBs.
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