Rizwan Qureshi has uploaded this change for review.

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soc/intel/{common,skl,icl,cnl}: Move some bootblock code to common location

Some of the bootblock functions defined in soc files are common
hence move them to common to reduce code redundancy.

BUG=None
BRANCH=None
TEST=Build and boot hatch board

Change-Id: Id7c563023c4b1ff4f42734f18b923d13afef4770
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
---
M src/soc/intel/cannonlake/Kconfig
M src/soc/intel/cannonlake/bootblock/bootblock.c
A src/soc/intel/common/basecode/bootblock/Kconfig
A src/soc/intel/common/basecode/bootblock/Makefile.inc
A src/soc/intel/common/basecode/bootblock/bootblock.c
M src/soc/intel/icelake/Kconfig
M src/soc/intel/icelake/bootblock/bootblock.c
M src/soc/intel/skylake/Kconfig
M src/soc/intel/skylake/bootblock/bootblock.c
9 files changed, 45 insertions(+), 49 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/35277/1
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index d949fff..2c6a1ce 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -82,6 +82,8 @@
select PMC_GLOBAL_RESET_ENABLE_LOCK
select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
+ select SOC_INTEL_COMMON_BASECODE
+ select SOC_INTEL_COMMON_BASECODE_BOOTBLOCK
select SOC_INTEL_COMMON_BLOCK
select SOC_INTEL_COMMON_BLOCK_ACPI
select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
diff --git a/src/soc/intel/cannonlake/bootblock/bootblock.c b/src/soc/intel/cannonlake/bootblock/bootblock.c
index 653ba30..386c40c 100644
--- a/src/soc/intel/cannonlake/bootblock/bootblock.c
+++ b/src/soc/intel/cannonlake/bootblock/bootblock.c
@@ -41,22 +41,6 @@
};
#endif

-asmlinkage void bootblock_c_entry(uint64_t base_timestamp)
-{
- /* Call lib/bootblock.c main */
- bootblock_main_with_basetime(base_timestamp);
-}
-
-void bootblock_soc_early_init(void)
-{
- bootblock_systemagent_early_init();
- bootblock_pch_early_init();
- bootblock_cpu_init();
- pch_early_iorange_init();
- if (CONFIG(INTEL_LPSS_UART_FOR_CONSOLE))
- uart_bootblock_init();
-}
-
void bootblock_soc_init(void)
{
/*
diff --git a/src/soc/intel/common/basecode/bootblock/Kconfig b/src/soc/intel/common/basecode/bootblock/Kconfig
new file mode 100644
index 0000000..626685e
--- /dev/null
+++ b/src/soc/intel/common/basecode/bootblock/Kconfig
@@ -0,0 +1,3 @@
+config SOC_INTEL_COMMON_BASECODE_BOOTBLOCK
+ bool
+ default n
diff --git a/src/soc/intel/common/basecode/bootblock/Makefile.inc b/src/soc/intel/common/basecode/bootblock/Makefile.inc
new file mode 100644
index 0000000..7b1a683
--- /dev/null
+++ b/src/soc/intel/common/basecode/bootblock/Makefile.inc
@@ -0,0 +1 @@
+bootblock-$(CONFIG_SOC_INTEL_COMMON_BASECODE_BOOTBLOCK) +=bootblock.c
diff --git a/src/soc/intel/common/basecode/bootblock/bootblock.c b/src/soc/intel/common/basecode/bootblock/bootblock.c
new file mode 100644
index 0000000..e2dd89c
--- /dev/null
+++ b/src/soc/intel/common/basecode/bootblock/bootblock.c
@@ -0,0 +1,35 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2017-2018 Intel Corporation..
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <bootblock_common.h>
+#include <intelblocks/uart.h>
+#include <soc/bootblock.h>
+#include <soc/pch.h>
+
+asmlinkage void bootblock_c_entry(uint64_t base_timestamp)
+{
+ /* Call lib/bootblock.c main */
+ bootblock_main_with_basetime(base_timestamp);
+}
+
+void bootblock_soc_early_init(void)
+{
+ bootblock_systemagent_early_init();
+ bootblock_pch_early_init();
+ bootblock_cpu_init();
+ pch_early_iorange_init();
+ if (CONFIG(INTEL_LPSS_UART_FOR_CONSOLE))
+ uart_bootblock_init();
+}
diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig
index 1bd478c..80f5f57 100644
--- a/src/soc/intel/icelake/Kconfig
+++ b/src/soc/intel/icelake/Kconfig
@@ -37,6 +37,8 @@
select SOC_AHCI_PORT_IMPLEMENTED_INVERT
select PMC_GLOBAL_RESET_ENABLE_LOCK
select SOC_INTEL_COMMON
+ select SOC_INTEL_COMMON_BASECODE
+ select SOC_INTEL_COMMON_BASECODE_BOOTBLOCK
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
select SOC_INTEL_COMMON_BLOCK
select SOC_INTEL_COMMON_BLOCK_ACPI
diff --git a/src/soc/intel/icelake/bootblock/bootblock.c b/src/soc/intel/icelake/bootblock/bootblock.c
index db43e50..3ecb7b7 100644
--- a/src/soc/intel/icelake/bootblock/bootblock.c
+++ b/src/soc/intel/icelake/bootblock/bootblock.c
@@ -20,22 +20,6 @@
#include <soc/iomap.h>
#include <soc/pch.h>

-asmlinkage void bootblock_c_entry(uint64_t base_timestamp)
-{
- /* Call lib/bootblock.c main */
- bootblock_main_with_basetime(base_timestamp);
-}
-
-void bootblock_soc_early_init(void)
-{
- bootblock_systemagent_early_init();
- bootblock_pch_early_init();
- bootblock_cpu_init();
- pch_early_iorange_init();
- if (CONFIG(INTEL_LPSS_UART_FOR_CONSOLE))
- uart_bootblock_init();
-}
-
void bootblock_soc_init(void)
{
report_platform_info();
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 9cb8d45..60c04e5 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -52,6 +52,8 @@
select PMC_GLOBAL_RESET_ENABLE_LOCK
select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
+ select SOC_INTEL_COMMON_BASECODE
+ select SOC_INTEL_COMMON_BASECODE_BOOTBLOCK
select SOC_INTEL_COMMON_BLOCK
select SOC_INTEL_COMMON_BLOCK_CAR
select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
diff --git a/src/soc/intel/skylake/bootblock/bootblock.c b/src/soc/intel/skylake/bootblock/bootblock.c
index e9ca2d8..4eb040f 100644
--- a/src/soc/intel/skylake/bootblock/bootblock.c
+++ b/src/soc/intel/skylake/bootblock/bootblock.c
@@ -19,23 +19,6 @@
#include <intelblocks/uart.h>
#include <soc/bootblock.h>

-asmlinkage void bootblock_c_entry(uint64_t base_timestamp)
-{
- /* Call lib/bootblock.c main */
- bootblock_main_with_basetime(base_timestamp);
-}
-
-void bootblock_soc_early_init(void)
-{
- bootblock_systemagent_early_init();
- bootblock_pch_early_init();
- bootblock_cpu_init();
- pch_early_iorange_init();
-
- if (CONFIG(INTEL_LPSS_UART_FOR_CONSOLE))
- uart_bootblock_init();
-}
-
void bootblock_soc_init(void)
{
/* FSP 2.0 does not provide FSP-T/TempRamInit init support yet */

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Id7c563023c4b1ff4f42734f18b923d13afef4770
Gerrit-Change-Number: 35277
Gerrit-PatchSet: 1
Gerrit-Owner: Rizwan Qureshi <rizwan.qureshi@intel.com>
Gerrit-MessageType: newchange