Martin Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/67680 )
(
3 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: soc/intel/apollolake: Add UFS Interrupt ......................................................................
soc/intel/apollolake: Add UFS Interrupt
According to Intel document number 336561, GLK has UFS (0x1d), so add the PCI interrupt.
Signed-off-by: Sean Rhodes sean@starlabs.systems Change-Id: I68bac590bd1a9a0b8213440e882c8f431f06c95f Reviewed-on: https://review.coreboot.org/c/coreboot/+/67680 Reviewed-by: Matt DeVillier matt.devillier@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/apollolake/acpi/pci_irqs.asl 1 file changed, 19 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved
diff --git a/src/soc/intel/apollolake/acpi/pci_irqs.asl b/src/soc/intel/apollolake/acpi/pci_irqs.asl index 585d9db..b47ac24 100644 --- a/src/soc/intel/apollolake/acpi/pci_irqs.asl +++ b/src/soc/intel/apollolake/acpi/pci_irqs.asl @@ -54,6 +54,9 @@ Package(){0x001BFFFF, 0, 0, SDCARD_INT}, #endif Package(){0x001CFFFF, 0, 0, EMMC_INT}, +#if CONFIG(SOC_INTEL_GEMINILAKE) + Package(){0x001DFFFF, 0, 0, UFS_INT}, +#endif Package(){0x001EFFFF, 0, 0, SDIO_INT}, Package(){0x001FFFFF, 0, 0, SMBUS_INT}, })