1 comment:
File Documentation/releases/coreboot-4.12-relnotes.md:
Historically the bootblock on x86 platforms has been compiled with
romcc. This means that the generated code only uses CPU registers
and therefore no stack. This 20K+ LOC compiler is limited and hard
to maintain and so is the code that one has to write in that
environment. A different solution is to set up Cache-as-Ram in the
bootblock and run GCC compiled code in the bootblock. The advantages
are increased flexibility and consistency with other architectures as
well as other stages: e.g. printing to console is possible and
VBOOT can run before romstage, making romstage updatable via RW FMAP
regions.
It's not about dropping it or not, it's that when you change the bootblock, you can't use normal/fal […]
Well the attempt is to design bootblock to be read-only flash region.
The equivalent of normal/fallback mechanism should appear for testing in just a few days.
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