Subrata Banik has uploaded this change for review.

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soc/intel/common/pch: Add Intel common reset code

Move all common SoC reset functionality into pch/reset and let
respective SoC to select required Kconfig to make use of the
common reset code block.

TEST=Able to boot CML and TGL platform.

Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Change-Id: Icafe931ba9920501cf5448290ddd9f897760bb75
---
A src/soc/intel/common/pch/reset/Kconfig
A src/soc/intel/common/pch/reset/Makefile.inc
A src/soc/intel/common/pch/reset/reset.c
3 files changed, 41 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/45336/1
diff --git a/src/soc/intel/common/pch/reset/Kconfig b/src/soc/intel/common/pch/reset/Kconfig
new file mode 100644
index 0000000..8d129ce
--- /dev/null
+++ b/src/soc/intel/common/pch/reset/Kconfig
@@ -0,0 +1,5 @@
+config SOC_INTEL_COMMON_PCH_RESET
+ bool
+ default n
+ help
+ This option allows to have common function to handle chipset reset request.
diff --git a/src/soc/intel/common/pch/reset/Makefile.inc b/src/soc/intel/common/pch/reset/Makefile.inc
new file mode 100644
index 0000000..3decf69
--- /dev/null
+++ b/src/soc/intel/common/pch/reset/Makefile.inc
@@ -0,0 +1,2 @@
+romstage-$(CONFIG_SOC_INTEL_COMMON_PCH_RESET) += reset.c
+ramstage-$(CONFIG_SOC_INTEL_COMMON_PCH_RESET) += reset.c
diff --git a/src/soc/intel/common/pch/reset/reset.c b/src/soc/intel/common/pch/reset/reset.c
new file mode 100644
index 0000000..d37ff54
--- /dev/null
+++ b/src/soc/intel/common/pch/reset/reset.c
@@ -0,0 +1,34 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <cf9_reset.h>
+#include <console/console.h>
+#include <intelblocks/cse.h>
+#include <intelblocks/pmclib.h>
+#include <fsp/util.h>
+#include <soc/intel/common/reset.h>
+#include <soc/pci_devs.h>
+
+void do_global_reset(void)
+{
+ /* Ask CSE to do the global reset */
+ if (cse_request_global_reset(GLOBAL_RESET))
+ return;
+
+ /* global reset if CSE fail to reset */
+ pmc_global_reset_enable(1);
+ do_full_reset();
+}
+
+void chipset_handle_reset(uint32_t status)
+{
+ switch (status) {
+ case FSP_STATUS_RESET_REQUIRED_3: /* Global Reset */
+ printk(BIOS_DEBUG, "GLOBAL RESET!!\n");
+ global_reset();
+ break;
+ default:
+ printk(BIOS_ERR, "unhandled reset type %x\n", status);
+ die("unknown reset type");
+ break;
+ }
+}

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Icafe931ba9920501cf5448290ddd9f897760bb75
Gerrit-Change-Number: 45336
Gerrit-PatchSet: 1
Gerrit-Owner: Subrata Banik <subrata.banik@intel.com>
Gerrit-MessageType: newchange