Patrick Rudolph has uploaded this change for review.
cpu/qemu-x86/cache_as_ram_bootblock: Fix wrong instruction
The shld instruction does an arithmetic shift left on 64bit operants,
but it's not the instruction we want, because what it actually does is
shifting by cl, and storing the result in address 32.
This wasn't notices as the DRAM is up and address 32 is valid. On real
hardware when CAR is running this instruction would cause a crash.
Replace the instruction with the correct 64bit arithmetic left shift.
Change-Id: Iedad9f4b693b1ea05898456eac2050a9389f6f19
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
---
M src/cpu/qemu-x86/cache_as_ram_bootblock.S
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/45820/1
diff --git a/src/cpu/qemu-x86/cache_as_ram_bootblock.S b/src/cpu/qemu-x86/cache_as_ram_bootblock.S
index 415ed24..eb7d2d9 100644
--- a/src/cpu/qemu-x86/cache_as_ram_bootblock.S
+++ b/src/cpu/qemu-x86/cache_as_ram_bootblock.S
@@ -30,7 +30,7 @@
/* Restore the BIST result and timestamps. */
#if defined(__x86_64__)
movd %mm2, %rdi
- shld %rdi, 32
+ shlq $32, %rdi
movd %mm1, %rsi
or %rsi, %rdi
To view, visit change 45820. To unsubscribe, or for help writing mail filters, visit settings.