Attention is currently required from: Jérémy Compostella, Kapil Porwal, Paul Menzel, Pranava Y N, Ronak Kanabar.

Jérémy Compostella uploaded patch set #12 to this change.

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The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins)

soc/intel/pantherlake: Add FSP-S programming

FSP-S UPDs are programmed according to the configuration (Kconfig and
device tree) in ramstage.

BUG=348678529
TEST=Hardware is programmed as desired and Intel Panther Lake
reference board boots to UI.

Change-Id: Iea26d962748116fa84afdb4afcba1098a64b6989
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
---
M src/soc/intel/pantherlake/fsp_params.c
1 file changed, 735 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/84552/12

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Gerrit-MessageType: newpatchset
Gerrit-Project: coreboot
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Gerrit-Change-Id: Iea26d962748116fa84afdb4afcba1098a64b6989
Gerrit-Change-Number: 84552
Gerrit-PatchSet: 12
Gerrit-Owner: Jérémy Compostella <jeremy.compostella@intel.com>
Gerrit-Reviewer: Kapil Porwal <kapilporwal@google.com>
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