Attention is currently required from: Fred Reitberger, Jason Glenesk, Matt DeVillier, ritul guru.
Felix Held would like ritul guru to review this change.
soc/amd/common/smi_util: add PSP SMI helper functions
The PSP can send SMIs to the x86 side of the system. Add helper
functions to configure and to reset the PSP SMI generation. Since
Stoneyridge also selects SOC_AMD_COMMON_BLOCK_SMI, add the SMITRIG0_PSP
define and rename SMITYPE_FCH_FAKE0 to SMITYPE_PSP to its SoC-specific
smi.h to bring it in line with the newer SoCs.
This patch is split out from CB:65523.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Signed-off-by: Ritul Guru <ritul.bits@gmail.com>
Change-Id: I525a447c9a75fdb95b9750e85a02896056315edf
---
M src/soc/amd/common/block/include/amdblocks/smi.h
M src/soc/amd/common/block/smi/smi_util.c
M src/soc/amd/stoneyridge/include/soc/smi.h
3 files changed, 27 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/83702/1
diff --git a/src/soc/amd/common/block/include/amdblocks/smi.h b/src/soc/amd/common/block/include/amdblocks/smi.h
index b870f16..6995bef 100644
--- a/src/soc/amd/common/block/include/amdblocks/smi.h
+++ b/src/soc/amd/common/block/include/amdblocks/smi.h
@@ -48,5 +48,7 @@
void gpe_configure_sci(const struct sci_source *scis, size_t num_gpes);
void clear_all_smi_status(void);
void clear_smi_sci_status(void);
+void reset_psp_smi(void);
+void configure_psp_smi(void);
#endif /* AMD_BLOCK_SMI_H */
diff --git a/src/soc/amd/common/block/smi/smi_util.c b/src/soc/amd/common/block/smi/smi_util.c
index ac2f4b4..c7643b3 100644
--- a/src/soc/amd/common/block/smi/smi_util.c
+++ b/src/soc/amd/common/block/smi/smi_util.c
@@ -154,3 +154,26 @@
{
smi_write32(SMI_SCI_STATUS, smi_read32(SMI_SCI_STATUS));
}
+
+static void clear_psp_smi(void)
+{
+ uint32_t reg32;
+ reg32 = smi_read32(SMI_REG_SMISTS1);
+ reg32 |= 1 << (SMITYPE_PSP % 32);
+ smi_write32(SMI_REG_SMISTS1, reg32);
+}
+
+void reset_psp_smi(void)
+{
+ uint32_t reg32;
+ reg32 = smi_read32(SMI_REG_SMITRIG0);
+ reg32 &= ~SMITRIG0_PSP;
+ smi_write32(SMI_REG_SMITRIG0, reg32);
+}
+
+void configure_psp_smi(void)
+{
+ clear_psp_smi();
+ reset_psp_smi();
+ configure_smi(SMITYPE_PSP, SMI_MODE_SMI);
+}
diff --git a/src/soc/amd/stoneyridge/include/soc/smi.h b/src/soc/amd/stoneyridge/include/soc/smi.h
index ccdd3c5..2a847aa 100644
--- a/src/soc/amd/stoneyridge/include/soc/smi.h
+++ b/src/soc/amd/stoneyridge/include/soc/smi.h
@@ -71,7 +71,7 @@
#define SMITYPE_ESPI_SYS 26
#define SMITYPE_ESPI_WAKE_PME 27
/* 28-32 Reserved */
-#define SMITYPE_FCH_FAKE0 33
+#define SMITYPE_PSP 33
#define SMITYPE_FCH_FAKE1 34
#define SMITYPE_FCH_FAKE2 35
/* 36 Reserved */
@@ -163,6 +163,7 @@
#define SMI_TIMER_EN (1 << 15)
#define SMI_REG_SMITRIG0 0x98
+# define SMITRIG0_PSP BIT(25)
# define SMITRG0_EOS BIT(28)
# define SMI_TIMER_SEL BIT(29)
# define SMITRG0_SMIENB BIT(31)
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