1 comment:
File src/soc/mediatek/mt8183/gpio.c:
Patch Set #2, Line 107: void *reg = GPIO_TO_IOCFG_BASE(gpio.base) + EH_RSEL_OFFSET;
If I understand this right, there are a few EH_RSEL registers (one per IOCFG base) where all the EH values need to be set to 0 and all the RSEL values need to be set to 3. Your code doesn't allow for any other values atm.
So rather than building this table that you have to search through once for every pin, why don't you just have three write32()s somewhere that initialize every EH and RSEL value correctly once at the start of the bootblock? that would seem much simpler and require much less code.
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