Angel Pons has uploaded this change for review.

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sb/intel/*/acpi/lpc.asl: Drop unnecessary RCBA offset

Nothing should be using this offset.

Change-Id: Ia4736471e2ac53bec18bfe073f4aa49e3fc524a8
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
---
M src/southbridge/intel/bd82x6x/acpi/lpc.asl
M src/southbridge/intel/i82801gx/acpi/lpc.asl
M src/southbridge/intel/i82801ix/acpi/lpc.asl
M src/southbridge/intel/i82801jx/acpi/lpc.asl
M src/southbridge/intel/lynxpoint/acpi/lpc.asl
5 files changed, 0 insertions(+), 25 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/46765/1
diff --git a/src/southbridge/intel/bd82x6x/acpi/lpc.asl b/src/southbridge/intel/bd82x6x/acpi/lpc.asl
index 85e8d24..7dd9623 100644
--- a/src/southbridge/intel/bd82x6x/acpi/lpc.asl
+++ b/src/southbridge/intel/bd82x6x/acpi/lpc.asl
@@ -43,11 +43,6 @@
GR13, 2,
GR14, 2,
GR15, 2,
-
- Offset (0xf0), // RCBA
- RCEN, 1,
- , 13,
- RCBA, 18,
}

#include <southbridge/intel/common/acpi/irqlinks.asl>
diff --git a/src/southbridge/intel/i82801gx/acpi/lpc.asl b/src/southbridge/intel/i82801gx/acpi/lpc.asl
index 1f9e701..ab6ffae 100644
--- a/src/southbridge/intel/i82801gx/acpi/lpc.asl
+++ b/src/southbridge/intel/i82801gx/acpi/lpc.asl
@@ -25,11 +25,6 @@
Offset (0x80), // IO Decode Ranges
IOD0, 8,
IOD1, 8,
-
- Offset (0xf0), // RCBA
- RCEN, 1,
- , 13,
- RCBA, 18,
}

#include <southbridge/intel/common/acpi/irqlinks.asl>
diff --git a/src/southbridge/intel/i82801ix/acpi/lpc.asl b/src/southbridge/intel/i82801ix/acpi/lpc.asl
index b93fa96..c351c53 100644
--- a/src/southbridge/intel/i82801ix/acpi/lpc.asl
+++ b/src/southbridge/intel/i82801ix/acpi/lpc.asl
@@ -25,11 +25,6 @@
Offset (0x80), // IO Decode Ranges
IOD0, 8,
IOD1, 8,
-
- Offset (0xf0), // RCBA
- RCEN, 1,
- , 13,
- RCBA, 18,
}

#include <southbridge/intel/common/acpi/irqlinks.asl>
diff --git a/src/southbridge/intel/i82801jx/acpi/lpc.asl b/src/southbridge/intel/i82801jx/acpi/lpc.asl
index b93fa96..c351c53 100644
--- a/src/southbridge/intel/i82801jx/acpi/lpc.asl
+++ b/src/southbridge/intel/i82801jx/acpi/lpc.asl
@@ -25,11 +25,6 @@
Offset (0x80), // IO Decode Ranges
IOD0, 8,
IOD1, 8,
-
- Offset (0xf0), // RCBA
- RCEN, 1,
- , 13,
- RCBA, 18,
}

#include <southbridge/intel/common/acpi/irqlinks.asl>
diff --git a/src/southbridge/intel/lynxpoint/acpi/lpc.asl b/src/southbridge/intel/lynxpoint/acpi/lpc.asl
index 0e8bad3..b95c2f0 100644
--- a/src/southbridge/intel/lynxpoint/acpi/lpc.asl
+++ b/src/southbridge/intel/lynxpoint/acpi/lpc.asl
@@ -29,11 +29,6 @@
Offset (0x80), // IO Decode Ranges
IOD0, 8,
IOD1, 8,
-
- Offset (0xf0), // RCBA
- RCEN, 1,
- , 13,
- RCBA, 18,
}

#include <southbridge/intel/common/acpi/irqlinks.asl>

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ia4736471e2ac53bec18bfe073f4aa49e3fc524a8
Gerrit-Change-Number: 46765
Gerrit-PatchSet: 1
Gerrit-Owner: Angel Pons <th3fanbus@gmail.com>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-MessageType: newchange