Marc Jones has uploaded this change for review.

View Change

soc/intel/xeon_sp/acpi.c: Add ACPI C-State table

Add ACPI _CST table.

Tested on deltalake with acpi_idle driver. Note, intel_idle may not
use ACPI _CST table.

Change-Id: I359daa9556edbe263ab0a7f1849c96c8fe1a0da0
Signed-off-by: Marc Jones <marcjones@sysproconsulting.com>
---
M src/soc/intel/xeon_sp/acpi.c
1 file changed, 42 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/49494/1

diff --git a/src/soc/intel/xeon_sp/acpi.c b/src/soc/intel/xeon_sp/acpi.c
index b271264..473263e 100644
--- a/src/soc/intel/xeon_sp/acpi.c
+++ b/src/soc/intel/xeon_sp/acpi.c
@@ -6,10 +6,50 @@
 #include <soc/util.h>
 #include <string.h>
 
+#define MWAIT_RES(state, sub_state)                         \
+	{                                                   \
+		.addrl = (((state) << 4) | (sub_state)),    \
+		.space_id = ACPI_ADDRESS_SPACE_FIXED,       \
+		.bit_width = ACPI_FFIXEDHW_VENDOR_INTEL,    \
+		.bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT,    \
+		.access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, \
+	}
+
+static acpi_cstate_t cstate_map[] = {
+	{
+		/* C1 */
+		.ctype = 1, /* ACPI C1 */
+		.latency = 1,
+		.power = 0x3e8,
+		.resource = MWAIT_RES(0, 0),
+	},
+	{
+		/* C3 */
+		.ctype = 2, /* ACPI C2 */
+		.latency = 15,
+		.power = 0x1f4,
+		.resource = MWAIT_RES(1, 0),
+	},
+	{
+		/* C6 */
+		.ctype = 3, /* ACPI C3 */
+		.latency = 41,
+		.power = 0x15e,
+		.resource = MWAIT_RES(2, 0),
+	},
+	{
+		/* C7 */
+		.ctype = 3, /* ACPI C3 */
+		.latency = 41,
+		.power = 0x0c8,
+		.resource = MWAIT_RES(3, 0),
+	}
+};
+
 acpi_cstate_t *soc_get_cstate_map(size_t *entries)
 {
-	*entries = 0;
-	return NULL;
+	*entries = ARRAY_SIZE(cstate_map);
+	return cstate_map;
 }
 
 static void print_madt_ioapic(int socket, int stack,

To view, visit change 49494. To unsubscribe, or for help writing mail filters, visit settings.