Matt DeVillier has uploaded this change for review.

View Change

sb/intel/lynxpoint: fix typo

Change-Id: I741b66e08d977f514f2512d626e3bcf22ce7d46c
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
---
M src/southbridge/intel/lynxpoint/pcie.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/46135/1

diff --git a/src/southbridge/intel/lynxpoint/pcie.c b/src/southbridge/intel/lynxpoint/pcie.c
index 66e46d3..e0d09fd 100644
--- a/src/southbridge/intel/lynxpoint/pcie.c
+++ b/src/southbridge/intel/lynxpoint/pcie.c
@@ -659,7 +659,7 @@
 
 	pci_update_config32(dev, 0x33c, ~0x00ffffff, 0x854c74);
 
-	/* Set Invalid Recieve Range Check Enable in MPC register. */
+	/* Set Invalid Receive Range Check Enable in MPC register. */
 	pci_or_config32(dev, 0xd8, 1 << 25);
 
 	pci_and_config8(dev, 0xf5, 0x3f);

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