Marc Karasek uploaded patch set #6 to this change.

View Change

qemu-riscv: Fix discovered DDR size

qemu-riscv value for DDR is incorrect. It was set to 32768 which
in turn is being used as 32768MB (32+GB), instead of the 32MB
it is intended to represent.

Change value so it is a select option based in menuconfig
based on what you want coreboot to "discover" on boot.

Four options are :
256MB
512MB
1024MB
2048MB

NOTE: You must specify greater than or equal to what is
chosen from the above items on the qemu cmdline.

This value is used in both romstage and ramstage to set the amount
of DDR present. This will be the above value minus the size of the
boot rom.

Fixes: https://ticket.coreboot.org/issues/254

TEST = qemu-system-riscv64 -M virt -m 1024M -nographic \
-bios build/coreboot.rom

TEST = qemu-system-riscv64 -M virt -m 1024M -nographic \
-kernel build/coreboot.elf

Signed-off-by: Marc Karasek <mkarasek@cryptocoretech.com>
Change-Id: Idef44eb8baf3e89d7c74fa452fc60b7beefa2c48
---
M src/mainboard/emulation/qemu-riscv/Kconfig
M src/mainboard/emulation/qemu-riscv/mainboard.c
M src/soc/ucb/riscv/cbmem.c
3 files changed, 36 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/38904/6

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Idef44eb8baf3e89d7c74fa452fc60b7beefa2c48
Gerrit-Change-Number: 38904
Gerrit-PatchSet: 6
Gerrit-Owner: Marc Karasek <marckarasek@gmail.com>
Gerrit-Reviewer: Marc Karasek <marckarasek@gmail.com>
Gerrit-Reviewer: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-Reviewer: Philipp Hug <philipp@hug.cx>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-Reviewer: ron minnich <rminnich@gmail.com>
Gerrit-MessageType: newpatchset