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• File src/soc/rockchip/rk3399/saradc.c:

  • Patch Set #1, Line 74: udelay(SARADC_DELAY_PU);

    i will modify it to 4M and do the test again.

    Please test multiple combinations (e.g. 4MHz 2 samples, 8MHz 4 samples, etc.) and also try to find a better understanding about the nature of the problem with your hardware engineers, so we can prove whether a certain way of sampling should work or not. In particular, please try to clarify if both delaying for more than two samples *and* reducing the sample frequency is equally necessary to resolve the problem... if only one of them helps, we don't need to waste boot time on the other.

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