Attention is currently required from: Hung-Te Lin, Paul Menzel, Yu-Ping Wu.
View Change
3 comments:
Commit Message:
Commit Message:
Patch Set #4, Line 7: soc/mediatek/mt8195: fix GPIO register offset
Plural: offsets?
Done
Patch Set #4, Line 10:
Where did you get the new values from? Did something not work before and works now?
I add document info in commit message.
To view, visit change 55163. To unsubscribe, or for help writing mail filters, visit settings.
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I9b0f8a24756092a97933cc9d4ba13a9e79c73e91
Gerrit-Change-Number: 55163
Gerrit-PatchSet: 5
Gerrit-Owner: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com>
Gerrit-Reviewer: Hung-Te Lin <hungte@chromium.org>
Gerrit-Reviewer: Yu-Ping Wu <yupingso@google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter@mailbox.org>
Gerrit-Attention: Hung-Te Lin <hungte@chromium.org>
Gerrit-Attention: Paul Menzel <paulepanter@mailbox.org>
Gerrit-Attention: Yu-Ping Wu <yupingso@google.com>
Gerrit-Comment-Date: Fri, 04 Jun 2021 06:33:25 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Hung-Te Lin <hungte@chromium.org>
Comment-In-Reply-To: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com>
Comment-In-Reply-To: Paul Menzel <paulepanter@mailbox.org>
Gerrit-MessageType: comment