Joel Kitching uploaded patch set #2 to this change.

View Change

vboot: standardize on working data size

Previously, the size of memory made for vb2_working_data
through the macro VBOOT2_WORK was always specified
in each individual memlayout file. However, there is
effectively no reason to provide this customizability --
the workbuf size required for verifying firmware has
never been more than 12K. (This could potentially
increase in the future if key sizes or algorithms are
changed, but this could be applied globally rather than
for each individual platform.)

This CL creates a new Kconfig option called
VBOOT_WORKING_DATA_SIZE, which is tied to the value
provided by vboot2 as VB2_WORKBUF_RECOMMENDED_DATA_SIZE
via a _Static_assert in vboot_loader.c

Additionally, this CL fixes up the logic of when to
include VBOOT2_WORK symbols on x86, which are only needed
when VBOOT_STARTS_IN_BOOTBLOCK is enabled.

Finally, this CL corrects the value of the __PRE_RAM__
macro in the case that VBOOT_STARTS_IN_ROMSTAGE is
selected. In this case, DRAM is already up and verstage
should not be considered pre-ram.

BUG=b:124141368, b:124192753
TEST=Build locally for eve
TEST=util/lint/checkpatch.pl -g origin/master..HEAD
TEST=util/abuild/abuild -B -e -y -c 50 -p none -x
TEST=make clean && make test-abuild
BRANCH=none

Change-Id: Id71a8ab2401efcc0194d48c8af9017fc90513cb8
Signed-off-by: Joel Kitching <kitching@google.com>
---
M src/arch/x86/car.ld
M src/include/memlayout.h
M src/security/vboot/Kconfig
M src/security/vboot/Makefile.inc
M src/security/vboot/common.c
M src/security/vboot/vboot_loader.c
M src/soc/cavium/cn81xx/include/soc/memlayout.ld
M src/soc/imgtec/pistachio/include/soc/memlayout.ld
M src/soc/mediatek/mt8173/include/soc/memlayout.ld
M src/soc/mediatek/mt8183/include/soc/memlayout.ld
M src/soc/nvidia/tegra124/include/soc/memlayout.ld
M src/soc/nvidia/tegra210/include/soc/memlayout.ld
M src/soc/qualcomm/ipq40xx/include/soc/memlayout.ld
M src/soc/qualcomm/ipq806x/include/soc/memlayout.ld
M src/soc/qualcomm/sdm845/include/soc/memlayout.ld
M src/soc/rockchip/rk3288/include/soc/memlayout.ld
M src/soc/rockchip/rk3399/include/soc/memlayout.ld
M src/soc/samsung/exynos5250/include/soc/memlayout.ld
18 files changed, 40 insertions(+), 36 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/31474/2

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Id71a8ab2401efcc0194d48c8af9017fc90513cb8
Gerrit-Change-Number: 31474
Gerrit-PatchSet: 2
Gerrit-Owner: Joel Kitching <kitching@google.com>
Gerrit-Reviewer: Aaron Durbin <adurbin@chromium.org>
Gerrit-Reviewer: Joel Kitching <kitching@google.com>
Gerrit-Reviewer: Julius Werner <jwerner@chromium.org>
Gerrit-Reviewer: Martin Roth <martinroth@google.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com>
Gerrit-Reviewer: Randall Spangler <rspangler@google.com>
Gerrit-MessageType: newpatchset