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Uhm, this looks more like a hack than a real solution to me. […]
I agree this isn't elegant. However, FSP lockdown is tied into soc/intel/common, so it's not like I can drop it in one patch. This change is a stopgap to prevent new boards from accidentally using CHIPSET_LOCKDOWN_FSP by omission.
Another approach would be to invert the enum values for chipset lockdown to make CHIPSET_LOCKDOWN_COREBOOT the default value, but that also requires checking each and every board. I'll see what I can do.
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I24a1a2fab166aa3bfe8e0b07f155f57f2bf745e3
Gerrit-Change-Number: 52096
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