Arthur Heymans uploaded patch set #6 to this change.

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soc/intel/xeon_sp: Configure DPR on all stacks

Configure DPR to span the region between TSEG_BASE and the cbmem_top.
This region was already unavailable to the OS.

Change-Id: Ia0d34e50b3d577f19172619156352534f740ea6b
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
---
M src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h
M src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h
M src/soc/intel/xeon_sp/uncore.c
3 files changed, 63 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/46818/6

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