Attention is currently required from: Felix Singer, Angel Pons.
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1 comment:
Patchset:
Patch Set #16:
Shouldn't this be done by whoever needs to use the device, though?
I believe we claim to offer PIC i8259 interrupt compatibility on entry to payload, thus a payload can be completely unaware of LAPICs and IOAPICs. And there is no standard way to determine what PCI device provides IOAPIC.
It is possibly only an IRQ0 timer routing entry that would be affected from the disabled bus-mastering. I have CB:55287 and trying to figure out there what to test.
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