Shelley Chen uploaded patch set #2 to this change.

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trogdor: Modify DDR training to use mrc_cache

Currently, trogdor devices have a section RO_DDR_TRAINING that is used
to store memory training data.  Changing so that we reuse the same
mrc_cache API as x86 platforms.  This requires renaming
RW_DDR_TRAINING to RW_MRC_CACHE and removing RO_DDR_TRAINING in the
fmap table.

BUG=b:150502246
BRANCH=None
TEST=FW_NAME="lazor" emerge-trogdor coreboot chromeos-bootimage
     Make sure that first boot after flashing does memory training
     and next boot does not.

Change-Id: I16d429119563707123d538738348c7c4985b7b52
Signed-off-by: Shelley Chen <shchen@google.com>
---
M src/lib/Makefile.inc
M src/mainboard/google/trogdor/chromeos.fmd
M src/soc/qualcomm/common/include/soc/qclib_common.h
M src/soc/qualcomm/common/qclib.c
M src/soc/qualcomm/sc7180/Kconfig
5 files changed, 11 insertions(+), 11 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/46111/2

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