Subrata Banik has uploaded this change for review.

View Change

soc/intel/common/basecode: Move block/acpi to basecode/acpi

This patch ensures that all required code changes been done
due to common code movement from block/acpi to basecode/acpi
code block.

Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Change-Id: Ia18ee1a8c5e795f9dbbc086cb6b39fbf59fc1655
---
M src/mainboard/google/dedede/dsdt.asl
M src/mainboard/google/deltaur/dsdt.asl
M src/mainboard/google/drallion/dsdt.asl
M src/mainboard/google/hatch/dsdt.asl
M src/mainboard/google/sarien/dsdt.asl
M src/mainboard/google/volteer/dsdt.asl
M src/mainboard/intel/cannonlake_rvp/dsdt.asl
M src/mainboard/intel/cedarisland_crb/dsdt.asl
M src/mainboard/intel/coffeelake_rvp/dsdt.asl
M src/mainboard/intel/icelake_rvp/dsdt.asl
M src/mainboard/intel/jasperlake_rvp/dsdt.asl
M src/mainboard/intel/tglrvp/dsdt.asl
M src/mainboard/prodrive/hermes/dsdt.asl
M src/mainboard/purism/librem_whl/dsdt.asl
M src/mainboard/system76/lemp9/dsdt.asl
M src/soc/intel/apollolake/Kconfig
M src/soc/intel/apollolake/acpi.c
M src/soc/intel/apollolake/acpi/southbridge.asl
M src/soc/intel/apollolake/chip.c
M src/soc/intel/cannonlake/Kconfig
M src/soc/intel/cannonlake/acpi.c
M src/soc/intel/cannonlake/acpi/southbridge.asl
M src/soc/intel/cannonlake/chip.c
M src/soc/intel/common/basecode/Kconfig
R src/soc/intel/common/basecode/acpi/Kconfig
A src/soc/intel/common/basecode/acpi/Makefile.inc
R src/soc/intel/common/basecode/acpi/acpi.c
R src/soc/intel/common/basecode/acpi/acpi/globalnvs.asl
R src/soc/intel/common/basecode/acpi/acpi/ipu.asl
R src/soc/intel/common/basecode/acpi/acpi/lpc.asl
R src/soc/intel/common/basecode/acpi/acpi/northbridge.asl
R src/soc/intel/common/basecode/acpi/acpi/pmc.asl
R src/soc/intel/common/basecode/include/intelbasecode/acpi.h
D src/soc/intel/common/block/acpi/Makefile.inc
M src/soc/intel/common/block/lpc/lpc.c
M src/soc/intel/common/block/systemagent/systemagent.c
M src/soc/intel/common/block/xhci/xhci.c
M src/soc/intel/denverton_ns/Kconfig
M src/soc/intel/denverton_ns/acpi.c
M src/soc/intel/denverton_ns/acpi/lpc.asl
M src/soc/intel/elkhartlake/Kconfig
M src/soc/intel/elkhartlake/acpi.c
M src/soc/intel/elkhartlake/acpi/southbridge.asl
M src/soc/intel/elkhartlake/chip.c
M src/soc/intel/icelake/Kconfig
M src/soc/intel/icelake/acpi.c
M src/soc/intel/icelake/acpi/southbridge.asl
M src/soc/intel/icelake/chip.c
M src/soc/intel/jasperlake/Kconfig
M src/soc/intel/jasperlake/acpi.c
M src/soc/intel/jasperlake/acpi/southbridge.asl
M src/soc/intel/jasperlake/chip.c
M src/soc/intel/skylake/acpi/ipu.asl
M src/soc/intel/skylake/acpi/lpc.asl
M src/soc/intel/tigerlake/Kconfig
M src/soc/intel/tigerlake/acpi.c
M src/soc/intel/tigerlake/acpi/southbridge.asl
M src/soc/intel/tigerlake/chip.c
M src/soc/intel/xeon_sp/cpx/acpi.c
M src/soc/intel/xeon_sp/skx/acpi.c
60 files changed, 74 insertions(+), 73 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/45560/1
diff --git a/src/mainboard/google/dedede/dsdt.asl b/src/mainboard/google/dedede/dsdt.asl
index 933ca1a..2f36703 100644
--- a/src/mainboard/google/dedede/dsdt.asl
+++ b/src/mainboard/google/dedede/dsdt.asl
@@ -16,7 +16,7 @@
#include <soc/intel/jasperlake/acpi/platform.asl>

/* global NVS and variables */
- #include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
+ #include <soc/intel/common/basecode/acpi/acpi/globalnvs.asl>

/* CPU */
#include <cpu/intel/common/acpi/cpu.asl>
@@ -24,7 +24,7 @@
Scope (\_SB) {
Device (PCI0)
{
- #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
+ #include <soc/intel/common/basecode/acpi/acpi/northbridge.asl>
#include <soc/intel/jasperlake/acpi/southbridge.asl>
}

diff --git a/src/mainboard/google/deltaur/dsdt.asl b/src/mainboard/google/deltaur/dsdt.asl
index fac58bd..6a216e6 100644
--- a/src/mainboard/google/deltaur/dsdt.asl
+++ b/src/mainboard/google/deltaur/dsdt.asl
@@ -16,14 +16,14 @@
#include <soc/intel/tigerlake/acpi/platform.asl>

/* global NVS and variables */
- #include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
+ #include <soc/intel/common/basecode/acpi/acpi/globalnvs.asl>

#include <cpu/intel/common/acpi/cpu.asl>

Scope (\_SB) {
Device (PCI0)
{
- #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
+ #include <soc/intel/common/basecode/acpi/acpi/northbridge.asl>
#include <soc/intel/tigerlake/acpi/southbridge.asl>
#include <soc/intel/tigerlake/acpi/tcss.asl>
}
diff --git a/src/mainboard/google/drallion/dsdt.asl b/src/mainboard/google/drallion/dsdt.asl
index ef2a94e..a699ce1 100644
--- a/src/mainboard/google/drallion/dsdt.asl
+++ b/src/mainboard/google/drallion/dsdt.asl
@@ -15,7 +15,7 @@
#include <soc/intel/cannonlake/acpi/platform.asl>

/* global NVS and variables */
- #include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
+ #include <soc/intel/common/basecode/acpi/acpi/globalnvs.asl>

/* CPU */
#include <cpu/intel/common/acpi/cpu.asl>
@@ -23,7 +23,7 @@
Scope (\_SB) {
Device (PCI0)
{
- #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
+ #include <soc/intel/common/basecode/acpi/acpi/northbridge.asl>
#include <soc/intel/cannonlake/acpi/southbridge.asl>
}
/* Per board variant mainboard hooks. */
diff --git a/src/mainboard/google/hatch/dsdt.asl b/src/mainboard/google/hatch/dsdt.asl
index d43a499..88fb977 100644
--- a/src/mainboard/google/hatch/dsdt.asl
+++ b/src/mainboard/google/hatch/dsdt.asl
@@ -16,7 +16,7 @@
#include <soc/intel/cannonlake/acpi/platform.asl>

/* global NVS and variables */
- #include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
+ #include <soc/intel/common/basecode/acpi/acpi/globalnvs.asl>

/* CPU */
#include <cpu/intel/common/acpi/cpu.asl>
@@ -24,7 +24,7 @@
Scope (\_SB) {
Device (PCI0)
{
- #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
+ #include <soc/intel/common/basecode/acpi/acpi/northbridge.asl>
#include <soc/intel/cannonlake/acpi/southbridge.asl>
}
}
diff --git a/src/mainboard/google/sarien/dsdt.asl b/src/mainboard/google/sarien/dsdt.asl
index b666fbc..8631e55 100644
--- a/src/mainboard/google/sarien/dsdt.asl
+++ b/src/mainboard/google/sarien/dsdt.asl
@@ -15,7 +15,7 @@
#include <soc/intel/cannonlake/acpi/platform.asl>

/* global NVS and variables */
- #include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
+ #include <soc/intel/common/basecode/acpi/acpi/globalnvs.asl>

/* CPU */
#include <cpu/intel/common/acpi/cpu.asl>
@@ -23,7 +23,7 @@
Scope (\_SB) {
Device (PCI0)
{
- #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
+ #include <soc/intel/common/basecode/acpi/acpi/northbridge.asl>
#include <soc/intel/cannonlake/acpi/southbridge.asl>
}
/* Per board variant mainboard hooks. */
diff --git a/src/mainboard/google/volteer/dsdt.asl b/src/mainboard/google/volteer/dsdt.asl
index d0bab1a..0a51a7f 100644
--- a/src/mainboard/google/volteer/dsdt.asl
+++ b/src/mainboard/google/volteer/dsdt.asl
@@ -16,7 +16,7 @@
#include <soc/intel/tigerlake/acpi/platform.asl>

// global NVS and variables
- #include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
+ #include <soc/intel/common/basecode/acpi/acpi/globalnvs.asl>

// CPU
#include <cpu/intel/common/acpi/cpu.asl>
@@ -24,7 +24,7 @@
Scope (\_SB) {
Device (PCI0)
{
- #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
+ #include <soc/intel/common/basecode/acpi/acpi/northbridge.asl>
#include <soc/intel/tigerlake/acpi/southbridge.asl>
#include <soc/intel/tigerlake/acpi/tcss.asl>
}
diff --git a/src/mainboard/intel/cannonlake_rvp/dsdt.asl b/src/mainboard/intel/cannonlake_rvp/dsdt.asl
index 5a06a45..b992cab 100644
--- a/src/mainboard/intel/cannonlake_rvp/dsdt.asl
+++ b/src/mainboard/intel/cannonlake_rvp/dsdt.asl
@@ -13,12 +13,12 @@
#include <soc/intel/cannonlake/acpi/platform.asl>

// global NVS and variables
- #include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
+ #include <soc/intel/common/basecode/acpi/acpi/globalnvs.asl>

Scope (\_SB) {
Device (PCI0)
{
- #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
+ #include <soc/intel/common/basecode/acpi/acpi/northbridge.asl>
#include <soc/intel/cannonlake/acpi/southbridge.asl>
}
}
diff --git a/src/mainboard/intel/cedarisland_crb/dsdt.asl b/src/mainboard/intel/cedarisland_crb/dsdt.asl
index 6f408b3..62492da 100644
--- a/src/mainboard/intel/cedarisland_crb/dsdt.asl
+++ b/src/mainboard/intel/cedarisland_crb/dsdt.asl
@@ -22,7 +22,7 @@
Device (PCI0)
{
#include <soc/intel/xeon_sp/cpx/acpi/southcluster.asl>
- #include <soc/intel/common/block/acpi/acpi/lpc.asl>
+ #include <soc/intel/common/basecode/acpi/acpi/lpc.asl>

}

diff --git a/src/mainboard/intel/coffeelake_rvp/dsdt.asl b/src/mainboard/intel/coffeelake_rvp/dsdt.asl
index 121012e..5e1c836 100644
--- a/src/mainboard/intel/coffeelake_rvp/dsdt.asl
+++ b/src/mainboard/intel/coffeelake_rvp/dsdt.asl
@@ -13,12 +13,12 @@
#include <soc/intel/cannonlake/acpi/platform.asl>

// global NVS and variables
- #include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
+ #include <soc/intel/common/basecode/acpi/acpi/globalnvs.asl>

Scope (\_SB) {
Device (PCI0)
{
- #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
+ #include <soc/intel/common/basecode/acpi/acpi/northbridge.asl>
#include <soc/intel/cannonlake/acpi/southbridge.asl>
}
}
diff --git a/src/mainboard/intel/icelake_rvp/dsdt.asl b/src/mainboard/intel/icelake_rvp/dsdt.asl
index a3c93e2..743850f 100644
--- a/src/mainboard/intel/icelake_rvp/dsdt.asl
+++ b/src/mainboard/intel/icelake_rvp/dsdt.asl
@@ -16,7 +16,7 @@
#include <soc/intel/icelake/acpi/platform.asl>

// global NVS and variables
- #include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
+ #include <soc/intel/common/basecode/acpi/acpi/globalnvs.asl>

// CPU
#include <cpu/intel/common/acpi/cpu.asl>
@@ -24,7 +24,7 @@
Scope (\_SB) {
Device (PCI0)
{
- #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
+ #include <soc/intel/common/basecode/acpi/acpi/northbridge.asl>
#include <soc/intel/icelake/acpi/southbridge.asl>
}
}
diff --git a/src/mainboard/intel/jasperlake_rvp/dsdt.asl b/src/mainboard/intel/jasperlake_rvp/dsdt.asl
index be883b4c..9f4f431 100644
--- a/src/mainboard/intel/jasperlake_rvp/dsdt.asl
+++ b/src/mainboard/intel/jasperlake_rvp/dsdt.asl
@@ -16,7 +16,7 @@
#include <soc/intel/jasperlake/acpi/platform.asl>

/* global NVS and variables */
- #include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
+ #include <soc/intel/common/basecode/acpi/acpi/globalnvs.asl>

/* CPU */
#include <cpu/intel/common/acpi/cpu.asl>
@@ -24,7 +24,7 @@
Scope (\_SB) {
Device (PCI0)
{
- #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
+ #include <soc/intel/common/basecode/acpi/acpi/northbridge.asl>
#include <soc/intel/jasperlake/acpi/southbridge.asl>
}
}
diff --git a/src/mainboard/intel/tglrvp/dsdt.asl b/src/mainboard/intel/tglrvp/dsdt.asl
index e34fd58..ce960a1 100644
--- a/src/mainboard/intel/tglrvp/dsdt.asl
+++ b/src/mainboard/intel/tglrvp/dsdt.asl
@@ -16,7 +16,7 @@
#include <soc/intel/tigerlake/acpi/platform.asl>

/* global NVS and variables */
- #include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
+ #include <soc/intel/common/basecode/acpi/acpi/globalnvs.asl>

/* CPU */
#include <cpu/intel/common/acpi/cpu.asl>
@@ -24,7 +24,7 @@
Scope (\_SB) {
Device (PCI0)
{
- #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
+ #include <soc/intel/common/basecode/acpi/acpi/northbridge.asl>
#include <soc/intel/tigerlake/acpi/southbridge.asl>
#include <soc/intel/tigerlake/acpi/tcss.asl>
}
diff --git a/src/mainboard/prodrive/hermes/dsdt.asl b/src/mainboard/prodrive/hermes/dsdt.asl
index 4d8d170..b7dfd26 100644
--- a/src/mainboard/prodrive/hermes/dsdt.asl
+++ b/src/mainboard/prodrive/hermes/dsdt.asl
@@ -13,11 +13,11 @@
#include <soc/intel/cannonlake/acpi/platform.asl>

// global NVS and variables
- #include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
+ #include <soc/intel/common/basecode/acpi/acpi/globalnvs.asl>

Scope (\_SB) {
Device (PCI0) {
- #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
+ #include <soc/intel/common/basecode/acpi/acpi/northbridge.asl>
#include <soc/intel/cannonlake/acpi/southbridge.asl>
}
}
diff --git a/src/mainboard/purism/librem_whl/dsdt.asl b/src/mainboard/purism/librem_whl/dsdt.asl
index 296be17..a72bcfd 100644
--- a/src/mainboard/purism/librem_whl/dsdt.asl
+++ b/src/mainboard/purism/librem_whl/dsdt.asl
@@ -11,12 +11,12 @@
)
{
#include <soc/intel/cannonlake/acpi/platform.asl>
- #include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
+ #include <soc/intel/common/basecode/acpi/acpi/globalnvs.asl>
#include <cpu/intel/common/acpi/cpu.asl>

Device (\_SB.PCI0)
{
- #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
+ #include <soc/intel/common/basecode/acpi/acpi/northbridge.asl>
#include <soc/intel/cannonlake/acpi/southbridge.asl>
}

diff --git a/src/mainboard/system76/lemp9/dsdt.asl b/src/mainboard/system76/lemp9/dsdt.asl
index eac27b5..779843d 100644
--- a/src/mainboard/system76/lemp9/dsdt.asl
+++ b/src/mainboard/system76/lemp9/dsdt.asl
@@ -11,12 +11,12 @@
)
{
#include <soc/intel/cannonlake/acpi/platform.asl>
- #include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
+ #include <soc/intel/common/basecode/acpi/acpi/globalnvs.asl>
#include <cpu/intel/common/acpi/cpu.asl>

Device (\_SB.PCI0)
{
- #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
+ #include <soc/intel/common/basecode/acpi/acpi/northbridge.asl>
#include <soc/intel/cannonlake/acpi/southbridge.asl>
}

diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index a30333b..7f85b78 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -60,9 +60,9 @@
select SA_ENABLE_IMR
select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
+ select SOC_INTEL_COMMON_BASECODE
select SOC_INTEL_COMMON_BLOCK
select SOC_INTEL_COMMON_BLOCK_POWER_LIMIT
- select SOC_INTEL_COMMON_BLOCK_ACPI
select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
select SOC_INTEL_COMMON_BLOCK_CPU
select SOC_INTEL_COMMON_BLOCK_DSP
diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c
index ee1a543..60985aa 100644
--- a/src/soc/intel/apollolake/acpi.c
+++ b/src/soc/intel/apollolake/acpi.c
@@ -11,7 +11,7 @@
#include <device/pci_ops.h>
#include <cbmem.h>
#include <gpio.h>
-#include <intelblocks/acpi.h>
+#include <intelbasecode/acpi.h>
#include <intelblocks/pmclib.h>
#include <intelblocks/sgx.h>
#include <intelblocks/p2sb.h>
diff --git a/src/soc/intel/apollolake/acpi/southbridge.asl b/src/soc/intel/apollolake/acpi/southbridge.asl
index f4d1497..5aee870b 100644
--- a/src/soc/intel/apollolake/acpi/southbridge.asl
+++ b/src/soc/intel/apollolake/acpi/southbridge.asl
@@ -18,7 +18,7 @@
#include "xhci.asl"

/* LPC */
-#include <soc/intel/common/block/acpi/acpi/lpc.asl>
+#include <soc/intel/common/basecode/acpi/acpi/lpc.asl>

/* eMMC */
#include "scs.asl"
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 9f73727..bdce049 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -9,7 +9,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
-#include <intelblocks/acpi.h>
+#include <intelbasecode/acpi.h>
#include <intelblocks/cfg.h>
#include <intelblocks/fast_spi.h>
#include <intelblocks/msr.h>
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 596de41..77046ce 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -102,8 +102,8 @@
select PMC_GLOBAL_RESET_ENABLE_LOCK
select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
+ select SOC_INTEL_COMMON_BASECODE
select SOC_INTEL_COMMON_BLOCK
- select SOC_INTEL_COMMON_BLOCK_ACPI
select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
select SOC_INTEL_COMMON_BLOCK_CPU
select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
diff --git a/src/soc/intel/cannonlake/acpi.c b/src/soc/intel/cannonlake/acpi.c
index f061c30..666a770 100644
--- a/src/soc/intel/cannonlake/acpi.c
+++ b/src/soc/intel/cannonlake/acpi.c
@@ -11,7 +11,7 @@
#include <ec/google/chromeec/ec.h>
#include <intelblocks/cpulib.h>
#include <intelblocks/pmclib.h>
-#include <intelblocks/acpi.h>
+#include <intelbasecode/acpi.h>
#include <intelblocks/p2sb.h>
#include <soc/cpu.h>
#include <soc/iomap.h>
diff --git a/src/soc/intel/cannonlake/acpi/southbridge.asl b/src/soc/intel/cannonlake/acpi/southbridge.asl
index a6b0237..715b565 100644
--- a/src/soc/intel/cannonlake/acpi/southbridge.asl
+++ b/src/soc/intel/cannonlake/acpi/southbridge.asl
@@ -20,7 +20,7 @@
#include "gfx.asl"

/* LPC 0:1f.0 */
-#include <soc/intel/common/block/acpi/acpi/lpc.asl>
+#include <soc/intel/common/basecode/acpi/acpi/lpc.asl>

/* PCH HDA */
#include "pch_hda.asl"
@@ -47,4 +47,4 @@
#include "pch_glan.asl"

/* PMC Core */
-#include <soc/intel/common/block/acpi/acpi/pmc.asl>
+#include <soc/intel/common/basecode/acpi/acpi/pmc.asl>
diff --git a/src/soc/intel/cannonlake/chip.c b/src/soc/intel/cannonlake/chip.c
index ef85215..1015ce3 100644
--- a/src/soc/intel/cannonlake/chip.c
+++ b/src/soc/intel/cannonlake/chip.c
@@ -4,7 +4,7 @@
#include <device/pci.h>
#include <fsp/api.h>
#include <fsp/util.h>
-#include <intelblocks/acpi.h>
+#include <intelbasecode/acpi.h>
#include <intelblocks/cfg.h>
#include <intelblocks/itss.h>
#include <intelblocks/pcie_rp.h>
diff --git a/src/soc/intel/common/basecode/Kconfig b/src/soc/intel/common/basecode/Kconfig
index 1c93244..50dd258 100644
--- a/src/soc/intel/common/basecode/Kconfig
+++ b/src/soc/intel/common/basecode/Kconfig
@@ -1,5 +1,6 @@
config SOC_INTEL_COMMON_BASECODE
bool
+ select SOC_INTEL_COMMON_BASECODE_ACPI
help
Common coreboot stages and non-IP block for Intel platform

diff --git a/src/soc/intel/common/block/acpi/Kconfig b/src/soc/intel/common/basecode/acpi/Kconfig
similarity index 77%
rename from src/soc/intel/common/block/acpi/Kconfig
rename to src/soc/intel/common/basecode/acpi/Kconfig
index ff59172..48ee919 100644
--- a/src/soc/intel/common/block/acpi/Kconfig
+++ b/src/soc/intel/common/basecode/acpi/Kconfig
@@ -1,4 +1,4 @@
-config SOC_INTEL_COMMON_BLOCK_ACPI
+config SOC_INTEL_COMMON_BASECODE_ACPI
depends on SOC_INTEL_COMMON_BLOCK_CPU
depends on SOC_INTEL_COMMON_BLOCK_PMC
bool
diff --git a/src/soc/intel/common/basecode/acpi/Makefile.inc b/src/soc/intel/common/basecode/acpi/Makefile.inc
new file mode 100644
index 0000000..1b73cd8
--- /dev/null
+++ b/src/soc/intel/common/basecode/acpi/Makefile.inc
@@ -0,0 +1 @@
+ramstage-$(CONFIG_SOC_INTEL_COMMON_BASECODE_ACPI) += acpi.c
diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/basecode/acpi/acpi.c
similarity index 99%
rename from src/soc/intel/common/block/acpi/acpi.c
rename to src/soc/intel/common/basecode/acpi/acpi.c
index 5951b30..7cf3457 100644
--- a/src/soc/intel/common/block/acpi/acpi.c
+++ b/src/soc/intel/common/basecode/acpi/acpi.c
@@ -10,7 +10,7 @@
#include <console/console.h>
#include <cpu/intel/turbo.h>
#include <cpu/x86/smm.h>
-#include <intelblocks/acpi.h>
+#include <intelbasecode/acpi.h>
#include <intelblocks/msr.h>
#include <intelblocks/pmclib.h>
#include <intelblocks/uart.h>
diff --git a/src/soc/intel/common/block/acpi/acpi/globalnvs.asl b/src/soc/intel/common/basecode/acpi/acpi/globalnvs.asl
similarity index 100%
rename from src/soc/intel/common/block/acpi/acpi/globalnvs.asl
rename to src/soc/intel/common/basecode/acpi/acpi/globalnvs.asl
diff --git a/src/soc/intel/common/block/acpi/acpi/ipu.asl b/src/soc/intel/common/basecode/acpi/acpi/ipu.asl
similarity index 100%
rename from src/soc/intel/common/block/acpi/acpi/ipu.asl
rename to src/soc/intel/common/basecode/acpi/acpi/ipu.asl
diff --git a/src/soc/intel/common/block/acpi/acpi/lpc.asl b/src/soc/intel/common/basecode/acpi/acpi/lpc.asl
similarity index 100%
rename from src/soc/intel/common/block/acpi/acpi/lpc.asl
rename to src/soc/intel/common/basecode/acpi/acpi/lpc.asl
diff --git a/src/soc/intel/common/block/acpi/acpi/northbridge.asl b/src/soc/intel/common/basecode/acpi/acpi/northbridge.asl
similarity index 100%
rename from src/soc/intel/common/block/acpi/acpi/northbridge.asl
rename to src/soc/intel/common/basecode/acpi/acpi/northbridge.asl
diff --git a/src/soc/intel/common/block/acpi/acpi/pmc.asl b/src/soc/intel/common/basecode/acpi/acpi/pmc.asl
similarity index 100%
rename from src/soc/intel/common/block/acpi/acpi/pmc.asl
rename to src/soc/intel/common/basecode/acpi/acpi/pmc.asl
diff --git a/src/soc/intel/common/block/include/intelblocks/acpi.h b/src/soc/intel/common/basecode/include/intelbasecode/acpi.h
similarity index 93%
rename from src/soc/intel/common/block/include/intelblocks/acpi.h
rename to src/soc/intel/common/basecode/include/intelbasecode/acpi.h
index 21664c8..09fb3f4 100644
--- a/src/soc/intel/common/block/include/intelblocks/acpi.h
+++ b/src/soc/intel/common/basecode/include/intelbasecode/acpi.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */

-#ifndef SOC_INTEL_COMMON_BLOCK_ACPI_H
-#define SOC_INTEL_COMMON_BLOCK_ACPI_H
+#ifndef SOC_INTEL_COMMON_BASECODE_ACPI_H
+#define SOC_INTEL_COMMON_BASECODE_ACPI_H

#include <acpi/acpi.h>
#include <device/device.h>
@@ -71,4 +71,4 @@
*/
void soc_power_states_generation(int core_id, int cores_per_package);

-#endif /* _SOC_INTEL_COMMON_BLOCK_ACPI_H_ */
+#endif /* _SOC_INTEL_COMMON_BASECODE_ACPI_H_ */
diff --git a/src/soc/intel/common/block/acpi/Makefile.inc b/src/soc/intel/common/block/acpi/Makefile.inc
deleted file mode 100644
index c6bdac5..0000000
--- a/src/soc/intel/common/block/acpi/Makefile.inc
+++ /dev/null
@@ -1 +0,0 @@
-ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI) += acpi.c
diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c
index 212fd70..b66f583 100644
--- a/src/soc/intel/common/block/lpc/lpc.c
+++ b/src/soc/intel/common/block/lpc/lpc.c
@@ -4,7 +4,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include <intelblocks/acpi.h>
+#include <intelbasecode/acpi.h>
#include <intelblocks/lpc_lib.h>
#include <soc/pm.h>

diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c
index 6fb7722..b0a4256 100644
--- a/src/soc/intel/common/block/systemagent/systemagent.c
+++ b/src/soc/intel/common/block/systemagent/systemagent.c
@@ -6,7 +6,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include <intelblocks/acpi.h>
+#include <intelbasecode/acpi.h>
#include <intelblocks/cfg.h>
#include <intelblocks/systemagent.h>
#include <smbios.h>
diff --git a/src/soc/intel/common/block/xhci/xhci.c b/src/soc/intel/common/block/xhci/xhci.c
index 47f2567..7b7b383 100644
--- a/src/soc/intel/common/block/xhci/xhci.c
+++ b/src/soc/intel/common/block/xhci/xhci.c
@@ -6,7 +6,7 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <drivers/usb/acpi/chip.h>
-#include <intelblocks/acpi.h>
+#include <intelbasecode/acpi.h>
#include <intelblocks/xhci.h>
#include <soc/pci_devs.h>

diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig
index 91b45dc..6597f1b 100644
--- a/src/soc/intel/denverton_ns/Kconfig
+++ b/src/soc/intel/denverton_ns/Kconfig
@@ -26,9 +26,9 @@
select PARALLEL_MP
select PCR_COMMON_IOSF_1_0
select INTEL_DESCRIPTOR_MODE_CAPABLE
+ select SOC_INTEL_COMMON_BASECODE
select SOC_INTEL_COMMON_BLOCK
select SOC_INTEL_COMMON_BLOCK_CPU
- select SOC_INTEL_COMMON_BLOCK_ACPI
select SOC_INTEL_COMMON_BLOCK_PMC
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select SOC_INTEL_COMMON_BLOCK_FAST_SPI
diff --git a/src/soc/intel/denverton_ns/acpi.c b/src/soc/intel/denverton_ns/acpi.c
index 944e8eb..d52c1ec 100644
--- a/src/soc/intel/denverton_ns/acpi.c
+++ b/src/soc/intel/denverton_ns/acpi.c
@@ -10,7 +10,7 @@
#include <device/pci_ops.h>
#include <cbmem.h>
#include <console/console.h>
-#include <intelblocks/acpi.h>
+#include <intelbasecode/acpi.h>
#include <soc/acpi.h>
#include <soc/cpu.h>
#include <soc/soc_util.h>
diff --git a/src/soc/intel/denverton_ns/acpi/lpc.asl b/src/soc/intel/denverton_ns/acpi/lpc.asl
index 133569b..e668f76 100644
--- a/src/soc/intel/denverton_ns/acpi/lpc.asl
+++ b/src/soc/intel/denverton_ns/acpi/lpc.asl
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */

// Intel LPC Bus Device - 0:1f.0
-#include <soc/intel/common/block/acpi/acpi/lpc.asl>
+#include <soc/intel/common/basecode/acpi/acpi/lpc.asl>

Scope (\_SB.PCI0.LPCB)
{
diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig
index 166bda0..7070d81 100644
--- a/src/soc/intel/elkhartlake/Kconfig
+++ b/src/soc/intel/elkhartlake/Kconfig
@@ -39,8 +39,8 @@
select CPU_INTEL_COMMON_SMM
select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
+ select SOC_INTEL_COMMON_BASECODE
select SOC_INTEL_COMMON_BLOCK
- select SOC_INTEL_COMMON_BLOCK_ACPI
select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
select SOC_INTEL_COMMON_BLOCK_CPU
select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
diff --git a/src/soc/intel/elkhartlake/acpi.c b/src/soc/intel/elkhartlake/acpi.c
index af837ab..c4679dc 100644
--- a/src/soc/intel/elkhartlake/acpi.c
+++ b/src/soc/intel/elkhartlake/acpi.c
@@ -10,7 +10,7 @@
#include <device/mmio.h>
#include <device/pci_ops.h>
#include <ec/google/chromeec/ec.h>
-#include <intelblocks/acpi.h>
+#include <intelbasecode/acpi.h>
#include <intelblocks/cpulib.h>
#include <intelblocks/pmclib.h>
#include <soc/cpu.h>
diff --git a/src/soc/intel/elkhartlake/acpi/southbridge.asl b/src/soc/intel/elkhartlake/acpi/southbridge.asl
index fd87469..c0b7426 100644
--- a/src/soc/intel/elkhartlake/acpi/southbridge.asl
+++ b/src/soc/intel/elkhartlake/acpi/southbridge.asl
@@ -15,7 +15,7 @@
#include "gpio.asl"

/* ESPI 0:1f.0 */
-#include <soc/intel/common/block/acpi/acpi/lpc.asl>
+#include <soc/intel/common/basecode/acpi/acpi/lpc.asl>

/* PCH HDA */
#include "pch_hda.asl"
@@ -39,7 +39,7 @@
#include <soc/intel/common/acpi/pci_osc.asl>

/* PMC Core*/
-#include <soc/intel/common/block/acpi/acpi/pmc.asl>
+#include <soc/intel/common/basecode/acpi/acpi/pmc.asl>

/* EMMC/SD card */
#include "scs.asl"
diff --git a/src/soc/intel/elkhartlake/chip.c b/src/soc/intel/elkhartlake/chip.c
index e4884ef..c738fdd 100644
--- a/src/soc/intel/elkhartlake/chip.c
+++ b/src/soc/intel/elkhartlake/chip.c
@@ -4,7 +4,7 @@
#include <device/pci.h>
#include <fsp/api.h>
#include <fsp/util.h>
-#include <intelblocks/acpi.h>
+#include <intelbasecode/acpi.h>
#include <intelblocks/cfg.h>
#include <intelblocks/itss.h>
#include <intelblocks/pcie_rp.h>
diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig
index 1e66e97..3a5d747 100644
--- a/src/soc/intel/icelake/Kconfig
+++ b/src/soc/intel/icelake/Kconfig
@@ -36,9 +36,9 @@
select PMC_GLOBAL_RESET_ENABLE_LOCK
select CPU_INTEL_COMMON_SMM
select SOC_INTEL_COMMON
+ select SOC_INTEL_COMMON_BASECODE
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
select SOC_INTEL_COMMON_BLOCK
- select SOC_INTEL_COMMON_BLOCK_ACPI
select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
select SOC_INTEL_COMMON_BLOCK_CPU
select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
diff --git a/src/soc/intel/icelake/acpi.c b/src/soc/intel/icelake/acpi.c
index ff66300..3a4cf6a 100644
--- a/src/soc/intel/icelake/acpi.c
+++ b/src/soc/intel/icelake/acpi.c
@@ -9,7 +9,7 @@
#include <ec/google/chromeec/ec.h>
#include <intelblocks/cpulib.h>
#include <intelblocks/pmclib.h>
-#include <intelblocks/acpi.h>
+#include <intelbasecode/acpi.h>
#include <soc/cpu.h>
#include <soc/iomap.h>
#include <soc/nvs.h>
diff --git a/src/soc/intel/icelake/acpi/southbridge.asl b/src/soc/intel/icelake/acpi/southbridge.asl
index 474c6cc..6abfc12 100644
--- a/src/soc/intel/icelake/acpi/southbridge.asl
+++ b/src/soc/intel/icelake/acpi/southbridge.asl
@@ -18,7 +18,7 @@
#include "gpio.asl"

/* ESPI 0:1f.0 */
-#include <soc/intel/common/block/acpi/acpi/lpc.asl>
+#include <soc/intel/common/basecode/acpi/acpi/lpc.asl>

/* PCH HDA */
#include "pch_hda.asl"
diff --git a/src/soc/intel/icelake/chip.c b/src/soc/intel/icelake/chip.c
index a455bfc..6933dc7 100644
--- a/src/soc/intel/icelake/chip.c
+++ b/src/soc/intel/icelake/chip.c
@@ -4,7 +4,7 @@
#include <device/pci.h>
#include <fsp/api.h>
#include <fsp/util.h>
-#include <intelblocks/acpi.h>
+#include <intelbasecode/acpi.h>
#include <intelblocks/cfg.h>
#include <intelblocks/itss.h>
#include <intelblocks/xdci.h>
diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig
index 15dc1b3..3e95ab0 100644
--- a/src/soc/intel/jasperlake/Kconfig
+++ b/src/soc/intel/jasperlake/Kconfig
@@ -38,8 +38,8 @@
select PMC_GLOBAL_RESET_ENABLE_LOCK
select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
+ select SOC_INTEL_COMMON_BASECODE
select SOC_INTEL_COMMON_BLOCK
- select SOC_INTEL_COMMON_BLOCK_ACPI
select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
select SOC_INTEL_COMMON_BLOCK_CPU
select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
diff --git a/src/soc/intel/jasperlake/acpi.c b/src/soc/intel/jasperlake/acpi.c
index 8673da1..48a2ee1 100644
--- a/src/soc/intel/jasperlake/acpi.c
+++ b/src/soc/intel/jasperlake/acpi.c
@@ -12,7 +12,7 @@
#include <ec/google/chromeec/ec.h>
#include <intelblocks/cpulib.h>
#include <intelblocks/pmclib.h>
-#include <intelblocks/acpi.h>
+#include <intelbasecode/acpi.h>
#include <soc/cpu.h>
#include <soc/iomap.h>
#include <soc/nvs.h>
diff --git a/src/soc/intel/jasperlake/acpi/southbridge.asl b/src/soc/intel/jasperlake/acpi/southbridge.asl
index 48411e4..243db61 100644
--- a/src/soc/intel/jasperlake/acpi/southbridge.asl
+++ b/src/soc/intel/jasperlake/acpi/southbridge.asl
@@ -18,7 +18,7 @@
#include "gpio.asl"

/* ESPI 0:1f.0 */
-#include <soc/intel/common/block/acpi/acpi/lpc.asl>
+#include <soc/intel/common/basecode/acpi/acpi/lpc.asl>

/* PCH HDA */
#include "pch_hda.asl"
@@ -45,7 +45,7 @@
#include <soc/intel/common/acpi/pci_osc.asl>

/* PMC Core*/
-#include <soc/intel/common/block/acpi/acpi/pmc.asl>
+#include <soc/intel/common/basecode/acpi/acpi/pmc.asl>

/* EMMC/SD card */
#include "scs.asl"
diff --git a/src/soc/intel/jasperlake/chip.c b/src/soc/intel/jasperlake/chip.c
index 36e0175..e05b7e9 100644
--- a/src/soc/intel/jasperlake/chip.c
+++ b/src/soc/intel/jasperlake/chip.c
@@ -4,7 +4,7 @@
#include <device/pci.h>
#include <fsp/api.h>
#include <fsp/util.h>
-#include <intelblocks/acpi.h>
+#include <intelbasecode/acpi.h>
#include <intelblocks/cfg.h>
#include <intelblocks/itss.h>
#include <intelblocks/pcie_rp.h>
diff --git a/src/soc/intel/skylake/acpi/ipu.asl b/src/soc/intel/skylake/acpi/ipu.asl
index 59028e6..cb97e9c 100644
--- a/src/soc/intel/skylake/acpi/ipu.asl
+++ b/src/soc/intel/skylake/acpi/ipu.asl
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */

-#include <soc/intel/common/block/acpi/acpi/ipu.asl>
+#include <soc/intel/common/basecode/acpi/acpi/ipu.asl>

/* IPU3 processing system - Device 14, Function 3 */
Device (CIO2)
diff --git a/src/soc/intel/skylake/acpi/lpc.asl b/src/soc/intel/skylake/acpi/lpc.asl
index 9fb027a..5df6b5d 100644
--- a/src/soc/intel/skylake/acpi/lpc.asl
+++ b/src/soc/intel/skylake/acpi/lpc.asl
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */

// Intel LPC Bus Device - 0:1f.0
-#include <soc/intel/common/block/acpi/acpi/lpc.asl>
+#include <soc/intel/common/basecode/acpi/acpi/lpc.asl>

Scope (\_SB.PCI0.LPCB)
{
diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
index a722144..2d2b48c 100644
--- a/src/soc/intel/tigerlake/Kconfig
+++ b/src/soc/intel/tigerlake/Kconfig
@@ -39,8 +39,8 @@
select PMC_GLOBAL_RESET_ENABLE_LOCK
select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
+ select SOC_INTEL_COMMON_BASECODE
select SOC_INTEL_COMMON_BLOCK
- select SOC_INTEL_COMMON_BLOCK_ACPI
select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
select SOC_INTEL_COMMON_BLOCK_CPU
select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
diff --git a/src/soc/intel/tigerlake/acpi.c b/src/soc/intel/tigerlake/acpi.c
index c7c5446..87e7fa4 100644
--- a/src/soc/intel/tigerlake/acpi.c
+++ b/src/soc/intel/tigerlake/acpi.c
@@ -12,7 +12,7 @@
#include <ec/google/chromeec/ec.h>
#include <intelblocks/cpulib.h>
#include <intelblocks/pmclib.h>
-#include <intelblocks/acpi.h>
+#include <intelbasecode/acpi.h>
#include <soc/cpu.h>
#include <soc/iomap.h>
#include <soc/nvs.h>
diff --git a/src/soc/intel/tigerlake/acpi/southbridge.asl b/src/soc/intel/tigerlake/acpi/southbridge.asl
index ff683cf..8fb3dda 100644
--- a/src/soc/intel/tigerlake/acpi/southbridge.asl
+++ b/src/soc/intel/tigerlake/acpi/southbridge.asl
@@ -18,7 +18,7 @@
#include "gpio.asl"

/* ESPI 0:1f.0 */
-#include <soc/intel/common/block/acpi/acpi/lpc.asl>
+#include <soc/intel/common/basecode/acpi/acpi/lpc.asl>

/* PCH HDA */
#include "pch_hda.asl"
@@ -42,4 +42,4 @@
#include <soc/intel/common/acpi/pci_osc.asl>

/* PMC Core*/
-#include <soc/intel/common/block/acpi/acpi/pmc.asl>
+#include <soc/intel/common/basecode/acpi/acpi/pmc.asl>
diff --git a/src/soc/intel/tigerlake/chip.c b/src/soc/intel/tigerlake/chip.c
index d3c3c62..511896a 100644
--- a/src/soc/intel/tigerlake/chip.c
+++ b/src/soc/intel/tigerlake/chip.c
@@ -5,7 +5,7 @@
#include <device/pci.h>
#include <fsp/api.h>
#include <fsp/util.h>
-#include <intelblocks/acpi.h>
+#include <intelbasecode/acpi.h>
#include <intelblocks/cfg.h>
#include <intelblocks/itss.h>
#include <intelblocks/pcie_rp.h>
diff --git a/src/soc/intel/xeon_sp/cpx/acpi.c b/src/soc/intel/xeon_sp/cpx/acpi.c
index 1328257..f0643ff 100644
--- a/src/soc/intel/xeon_sp/cpx/acpi.c
+++ b/src/soc/intel/xeon_sp/cpx/acpi.c
@@ -11,7 +11,7 @@
#include <cpu/intel/turbo.h>
#include <cpu/x86/smm.h>
#include <device/pci.h>
-#include <intelblocks/acpi.h>
+#include <intelbasecode/acpi.h>
#include <hob_iiouds.h>
#include <hob_memmap.h>
#include <soc/acpi.h>
diff --git a/src/soc/intel/xeon_sp/skx/acpi.c b/src/soc/intel/xeon_sp/skx/acpi.c
index d984d9f..647e369 100644
--- a/src/soc/intel/xeon_sp/skx/acpi.c
+++ b/src/soc/intel/xeon_sp/skx/acpi.c
@@ -4,7 +4,7 @@
#include <acpi/acpi_gnvs.h>
#include <acpi/acpigen.h>
#include <arch/smp/mpspec.h>
-#include <intelblocks/acpi.h>
+#include <intelbasecode/acpi.h>
#include <device/pci.h>
#include <cbmem.h>
#include <cpu/x86/smm.h>

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ia18ee1a8c5e795f9dbbc086cb6b39fbf59fc1655
Gerrit-Change-Number: 45560
Gerrit-PatchSet: 1
Gerrit-Owner: Subrata Banik <subrata.banik@intel.com>
Gerrit-MessageType: newchange