Patch Set 22:

@Subrata, I can't find document for CPU PCIE ports. so far, PEG is represented Graphics. Could you help answer some questions for me?
1. Can this use for another usage?
2. Is it possible CPU PCIE ports overlap PCH ports? If not, maybe we can use flags to combine it.
3. PEG need CLKREQ or not?
4. Does CPU PCIE only depend on pci 06.0? Below description is wrong? Looks like copied from PCIE RP, I don't have ADL FSP to check...

/** Offset 0x0224 - Enable PCIE RP Mask
  Enable/disable PCIE Root Ports. 0: disable, 1: enable. One bit for each port, bit0
  for port1, bit1 for port2, and so on.
**/
  UINT32                      CpuPcieRpEnableMask;

@Subrata, could you help to find person to help answer my question??

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