Arthur Heymans submitted this change.
cpu/intel/car/p4: Add x86_64 support
Change-Id: I77516e3cd5f0d3b7442be660c005a65b00454343
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56021
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
---
M src/cpu/intel/car/p4-netburst/cache_as_ram.S
1 file changed, 11 insertions(+), 0 deletions(-)
diff --git a/src/cpu/intel/car/p4-netburst/cache_as_ram.S b/src/cpu/intel/car/p4-netburst/cache_as_ram.S
index 71ec9e3..9ac9e22 100644
--- a/src/cpu/intel/car/p4-netburst/cache_as_ram.S
+++ b/src/cpu/intel/car/p4-netburst/cache_as_ram.S
@@ -359,6 +359,16 @@
andl $0xfffffff0, %esp
subl $4, %esp
+#if ENV_X86_64
+ #include <cpu/x86/64bit/entry64.inc>
+
+ movd %mm2, %rdi
+ shlq $32, %rdi /* BIST */
+ movd %mm1, %rsi
+ or %rsi, %rdi /* tsc[63:32] */
+ movd %mm0, %rsi /* tsc[31:0] */
+
+#else
/* push TSC and BIST to stack */
movd %mm0, %eax
pushl %eax /* BIST */
@@ -366,6 +376,7 @@
pushl %eax /* tsc[63:32] */
movd %mm1, %eax
pushl %eax /* tsc[31:0] */
+#endif
before_c_entry:
post_code(0x2f)
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