Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson.

Felix Held has uploaded this change for review.

View Change

soc/amd/cezanne/agesa_acpi: add and call agesa_write_acpi_tables

This function will be used to add some SSDTs.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ia88cb5ea483850a8659f3bae8040c82eb2735d26
---
M src/soc/amd/cezanne/Makefile.inc
A src/soc/amd/cezanne/agesa_acpi.c
M src/soc/amd/cezanne/chip.c
M src/soc/amd/cezanne/include/soc/acpi.h
4 files changed, 25 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/52902/1
diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc
index e51a616..ebdad45 100644
--- a/src/soc/amd/cezanne/Makefile.inc
+++ b/src/soc/amd/cezanne/Makefile.inc
@@ -32,6 +32,7 @@

ramstage-y += i2c.c
ramstage-y += acpi.c
+ramstage-y += agesa_acpi.c
ramstage-y += chip.c
ramstage-y += cpu.c
ramstage-y += data_fabric.c
diff --git a/src/soc/amd/cezanne/agesa_acpi.c b/src/soc/amd/cezanne/agesa_acpi.c
new file mode 100644
index 0000000..8084e4d
--- /dev/null
+++ b/src/soc/amd/cezanne/agesa_acpi.c
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpi.h>
+#include <amdblocks/acpi.h>
+#include <device/device.h>
+#include <soc/acpi.h>
+#include <types.h>
+
+uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current,
+ acpi_rsdp_t *rsdp)
+{
+ return current;
+}
diff --git a/src/soc/amd/cezanne/chip.c b/src/soc/amd/cezanne/chip.c
index 8625bd7..625f46c 100644
--- a/src/soc/amd/cezanne/chip.c
+++ b/src/soc/amd/cezanne/chip.c
@@ -4,6 +4,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <fsp/api.h>
+#include <soc/acpi.h>
#include <soc/cpu.h>
#include <soc/data_fabric.h>
#include <soc/pci_devs.h>
@@ -79,6 +80,8 @@

static void soc_init(void *chip_info)
{
+ default_dev_ops_root.write_acpi_tables = agesa_write_acpi_tables;
+
fsp_silicon_init();

data_fabric_set_mmio_np();
diff --git a/src/soc/amd/cezanne/include/soc/acpi.h b/src/soc/amd/cezanne/include/soc/acpi.h
index 1b1d2fb..ab90c96 100644
--- a/src/soc/amd/cezanne/include/soc/acpi.h
+++ b/src/soc/amd/cezanne/include/soc/acpi.h
@@ -3,6 +3,11 @@
#ifndef AMD_CEZANNE_ACPI_H
#define AMD_CEZANNE_ACPI_H

+#include <acpi/acpi.h>
+#include <amdblocks/acpi.h>
+#include <device/device.h>
+#include <stdint.h>
+
#define ACPI_SCI_IRQ 9

/* RTC Registers */
@@ -10,4 +15,7 @@
#define RTC_ALT_CENTURY 0x32
#define RTC_CENTURY 0x48

+uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current,
+ acpi_rsdp_t *rsdp);
+
#endif /* AMD_CEZANNE_ACPI_H */

To view, visit change 52902. To unsubscribe, or for help writing mail filters, visit settings.

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ia88cb5ea483850a8659f3bae8040c82eb2735d26
Gerrit-Change-Number: 52902
Gerrit-PatchSet: 1
Gerrit-Owner: Felix Held <felix-coreboot@felixheld.de>
Gerrit-Reviewer: Jason Glenesk <jason.glenesk@gmail.com>
Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd@gmail.com>
Gerrit-Reviewer: Raul Rangel <rrangel@chromium.org>
Gerrit-Attention: Jason Glenesk <jason.glenesk@gmail.com>
Gerrit-Attention: Raul Rangel <rrangel@chromium.org>
Gerrit-Attention: Marshall Dawson <marshalldawson3rd@gmail.com>
Gerrit-MessageType: newchange