Martin L Roth submitted this change.

View Change

Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved
src/arch/x86/exit_car: Add proper x86_64 code

Don't truncate upper bits in assembly code and thus allow loading
of postcar stage above 4GiB.

Tested on qemu with cbmem_top set to TOUUD.

Change-Id: I42d1086f1220e44076ccf613244fc3c6d804805b
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Signed-off-by: Benjamin Doron <benjamin.doron@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79162
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
---
M src/arch/x86/exit_car.S
1 file changed, 6 insertions(+), 0 deletions(-)

diff --git a/src/arch/x86/exit_car.S b/src/arch/x86/exit_car.S
index c9ff866..d435dbe 100644
--- a/src/arch/x86/exit_car.S
+++ b/src/arch/x86/exit_car.S
@@ -67,8 +67,14 @@
invd

movl $_estack, %esp
+#if ENV_X86_64
+ /* Align stack to 16 bytes at call instruction. */
+ movq $0xfffffffffffffff0, %rax
+ and %rax, %rsp
+#else
/* Align stack to 16 bytes at call instruction. */
andl $0xfffffff0, %esp
+#endif

/* Call this in assembly as some platforms like to mess with the bootflow and
call into main directly from chipset_teardown_car. */

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Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I42d1086f1220e44076ccf613244fc3c6d804805b
Gerrit-Change-Number: 79162
Gerrit-PatchSet: 4
Gerrit-Owner: Benjamin Doron <benjamin.doron00@gmail.com>
Gerrit-Reviewer: Arthur Heymans <arthur@aheymans.xyz>
Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella@intel.com>
Gerrit-Reviewer: Martin L Roth <gaumless@gmail.com>
Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph@9elements.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-MessageType: merged