Sudheer Amrabadi has uploaded this change for review.

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mb/google/herobrine: Add support to enable display

This change adds support to enable edp gpios, display init for herobrine.

Change-Id: I01dbe23afbb3d41d87f24cb7dcfa456cb7f133fb
Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com>
---
M src/mainboard/google/herobrine/board.h
M src/mainboard/google/herobrine/mainboard.c
2 files changed, 40 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/64885/1

diff --git a/src/mainboard/google/herobrine/board.h b/src/mainboard/google/herobrine/board.h
index 0e06cd9..4c2aad6 100644
--- a/src/mainboard/google/herobrine/board.h
+++ b/src/mainboard/google/herobrine/board.h
@@ -49,6 +49,10 @@
 #define GPIO_EN_FP_RAILS	dead_code_t(gpio_t)
 #endif
 
+/* Display specific gpios */
+#define GPIO_PANEL_POWER_ON	GPIO(80)
+#define GPIO_PANEL_HPD		GPIO(60)
+
 void setup_chromeos_gpios(void);
 
 #endif /* _COREBOOT_SRC_MAINBOARD_GOOGLE_HEROBRINE_BOARD_H_ */
diff --git a/src/mainboard/google/herobrine/mainboard.c b/src/mainboard/google/herobrine/mainboard.c
index 5da78e6..a5e06f1 100644
--- a/src/mainboard/google/herobrine/mainboard.c
+++ b/src/mainboard/google/herobrine/mainboard.c
@@ -1,7 +1,11 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include "board.h"
+#include <bootmode.h>
+#include <boardid.h>
 #include <bootblock_common.h>
+#include <edid.h>
+#include <console/console.h>
 #include <device/device.h>
 #include <device/mmio.h>
 #include <soc/pcie.h>
@@ -11,6 +15,9 @@
 #include <soc/qcom_qup_se.h>
 #include <soc/usb/usb_common.h>
 #include <soc/usb/snps_usb_phy.h>
+#include <soc/display/mdssreg.h>
+#include <soc/display/edp_ctrl.h>
+#include <delay.h>
 
 static struct usb_board_data usb0_board_data = {
 	.parameter_override_x0 = 0xe6,
@@ -63,6 +70,34 @@
 		GPIO_NO_PULL, GPIO_16MA, GPIO_OUTPUT);
 }
 
+static void edp_configure_gpios(void)
+{
+	/* Panel power on gpio enable*/
+	gpio_output(GPIO_PANEL_POWER_ON, 1);
+
+	/* Panel HPD GPIO enable */
+	gpio_input_pulldown(GPIO_PANEL_HPD);
+}
+
+static void display_startup(void)
+{
+	struct edid ed;
+
+	if (display_init_required()) {
+		enable_mdss_clk();
+		edp_configure_gpios();
+		mdelay(250); /* Delay for the panel to be up */
+		if (edp_ctrl_init(&ed) == CB_SUCCESS) {
+			mdp_dsi_video_config(&ed);
+			mdp_dsi_video_on();
+			edid_set_framebuffer_bits_per_pixel(&ed, 32, 0);
+			fb_new_framebuffer_info_from_edid(&ed, (uintptr_t)0);
+		}
+	} else {
+		printk(BIOS_INFO, "Skipping display init.\n");
+	}
+}
+
 static void mainboard_init(struct device *dev)
 {
 	/* Configure clock for eMMC */
@@ -122,6 +157,7 @@
 
 	/* Set up PCIe in RC mode */
 	setup_pcie();
+	display_startup();
 }
 
 static void mainboard_enable(struct device *dev)

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