Paul Menzel has uploaded this change for review.

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cpu/amd: Use `get_option()`

Fix warnings on the console.

coreboot-4.9-214-g0dd2014390 Mon Jan 7 15:17:13 UTC 2019 romstage starting...
NOTICE: read_option() used to access CMOS from non-ROMCC code, please use get_option() instead.
NOTICE: read_option() used to access CMOS from non-ROMCC code, please use get_option() instead.
NOTICE: read_option() used to access CMOS from non-ROMCC code, please use get_option() instead.

Change-Id: I8501ff256676cd0ec4b59b28f4f1e0f2a9f74cac
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
---
M src/cpu/amd/family_10h-family_15h/init_cpus.c
1 file changed, 16 insertions(+), 6 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/30715/1
diff --git a/src/cpu/amd/family_10h-family_15h/init_cpus.c b/src/cpu/amd/family_10h-family_15h/init_cpus.c
index 2ddbc43..b8e11e4 100644
--- a/src/cpu/amd/family_10h-family_15h/init_cpus.c
+++ b/src/cpu/amd/family_10h-family_15h/init_cpus.c
@@ -147,6 +147,9 @@
// here assume the OS don't change our apicid
u32 ap_apicid;

+ u8 nvram;
+ bool multicore;
+
u32 nodes;
u32 disable_siblings;
u32 cores_found;
@@ -155,12 +158,13 @@
/* get_nodes define in ht_wrapper.c */
nodes = get_nodes();

- if (!IS_ENABLED(CONFIG_LOGICAL_CPUS) ||
- read_option(multi_core, 0) != 0) { // 0 means multi core
+ multicore = true;
+ if (get_option(&nvram, "multi_core") == CB_SUCCESS)
+ multicore = !!nvram;
+
+ disable_siblings = 0;
+ if (!IS_ENABLED(CONFIG_LOGICAL_CPUS) || !multicore)
disable_siblings = 1;
- } else {
- disable_siblings = 0;
- }

for (i = 0; i < nodes; i++) {
if ((node >= 0) && (i != node))
@@ -635,11 +639,17 @@
//it is running on core0 of node0
void start_other_cores(uint32_t bsp_apicid)
{
+ u8 nvram;
u32 nodes;
u32 nodeid;
+ bool multicore;

// disable multi_core
- if (read_option(multi_core, 0) != 0) {
+ multicore = true;
+ if (get_option(&nvram, "multi_core") == CB_SUCCESS)
+ multicore = !!nvram;
+
+ if (!multicore) {
printk(BIOS_DEBUG, "Skip additional core init\n");
return;
}

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I8501ff256676cd0ec4b59b28f4f1e0f2a9f74cac
Gerrit-Change-Number: 30715
Gerrit-PatchSet: 1
Gerrit-Owner: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-MessageType: newchange