Subrata Banik uploaded patch set #2 to this change.

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soc/intel/icelake: Make correct C-state entries for S0ix and non-S0ix

TEST=Dump SSDT entries to verify _CST between S0ix enable and disable.
>> iasl -d SSDT # to generate SSDT.dsl

Change-Id: I82d8bf9d143263a80a544f6e11186a3bc9c41052
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
---
M src/soc/intel/icelake/acpi.c
1 file changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/31153/2

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I82d8bf9d143263a80a544f6e11186a3bc9c41052
Gerrit-Change-Number: 31153
Gerrit-PatchSet: 2
Gerrit-Owner: Subrata Banik <subrata.banik@intel.com>
Gerrit-Reviewer: Aamir Bohra <aamir.bohra@intel.com>
Gerrit-Reviewer: Duncan Laurie <dlaurie@chromium.org>
Gerrit-Reviewer: Furquan Shaikh <furquan@google.com>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-Reviewer: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar@intel.com>
Gerrit-Reviewer: Shelley Chen <shchen@google.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik@intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-MessageType: newpatchset