Maulik V Vaghela uploaded patch set #3 to this change.

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mb/intel/jasperlake_rvp: Add memory initialization parameters

JasperLake RVP has 2 different memory support: DDR4 and LPDDR4x

Since there are no major difference except for memory configuration,
we're not creating variants for this. We'll handle memory parameters
based on board id.
Board Id for DDR4 board is 1 and LPDDR4 board is 4.

BUG=NONE
BRANCH=NONE
TEST=Build jslrvp board and check compilation

Change-Id: Ia59b37900a7f3dba66f47c8f7333aa3503847fff
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
---
M src/mainboard/intel/jasperlake_rvp/romstage_fsp_params.c
M src/mainboard/intel/jasperlake_rvp/spd/Makefile.inc
A src/mainboard/intel/jasperlake_rvp/spd/micron16Gb.spd.hex
M src/mainboard/intel/jasperlake_rvp/spd/spd_util.c
4 files changed, 113 insertions(+), 38 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/38507/3

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