Patch Set 1:

While technically correct I don't see why we need to duplicate code and Kconfig options.
Can you move the bd82x6x code to sb/intel/common and just use that instead ?

Done.

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2 comments:

• File src/southbridge/intel/common/finalize.c:

  • Patch Set #2, Line 61: pci_update_config32(lpc_dev, D31F0_ETR3, ~ETR3_CF9GR, ETR3_CF9LOCK);

    Public docs don't mention ETR3 for any platform before Sunrise Point,
    as far as I can tell. So I'm not sure if it's valid.

  • Patch Set #2, Line 62:

    
    	/* PMSYNC */
    	RCBA32_OR(0x33c4, (1UL << 31));
    

    Public docs don't mention PMSYNC, as far as I can tell. So I'm not sure
    if it's valid for anything other than Lynx Point.

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