Leroy P Leahy (leroy.p.leahy@intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14554
-gerrit
commit f7c343ff777389fbacfd0b0c1cbd7bff2c06abf1 Author: Lee Leahy leroy.p.leahy@intel.com Date: Fri Apr 29 17:26:36 2016 -0700
lib/reg_script: Allow multiple independent handlers
Remove the platform_bus_table routine and replace it with a link time table. This allows the handlers to be spread across multiple modules without any one module knowing about all of the handlers.
Establish number ranges for both the SOC and mainboard.
TEST=Build and run on Galileo Gen2
Change-Id: I0823d443d3352f31ba7fa20845bbf550b585c86f Signed-off-by: Lee Leahy leroy.p.leahy@intel.com --- src/include/reg_script.h | 14 ++++++++------ src/lib/program.ld | 5 +++++ src/lib/reg_script.c | 26 +++++++------------------- src/soc/intel/braswell/iosf.c | 12 +++--------- 4 files changed, 23 insertions(+), 34 deletions(-)
diff --git a/src/include/reg_script.h b/src/include/reg_script.h index 741641a..da01481 100644 --- a/src/include/reg_script.h +++ b/src/include/reg_script.h @@ -60,7 +60,9 @@ enum {
/* Insert other platform independent values above this comment */
- REG_SCRIPT_TYPE_PLATFORM_BASE = 0x10000 + REG_SCRIPT_TYPE_PLATFORM_BASE = 0x10000, + REG_SCRIPT_TYPE_SOC_BASE = REG_SCRIPT_TYPE_PLATFORM_BASE, + REG_SCRIPT_TYPE_MAINBOARD_BASE = 0x20000 };
enum { @@ -92,17 +94,17 @@ struct reg_script_context { const struct reg_script *step; };
-#ifndef __PRE_RAM__ struct reg_script_bus_entry { - int type; + uint32_t type; uint64_t (*reg_script_read)(struct reg_script_context *ctx); void (*reg_script_write)(struct reg_script_context *ctx); };
-/* Get the address and length of the platform bus table */ -const struct reg_script_bus_entry *platform_bus_table(size_t *table_entries); +#define REG_SCRIPT_TABLE_ATTRIBUTE __attribute__ ((used,section (".rsbe_init")))
-#endif /* __PRE_RAM */ +#define REG_SCRIPT_BUS_ENTRY(bus_entry_) \ + const struct reg_script_bus_entry *rsbe_ ## bus_entry_ \ + REG_SCRIPT_TABLE_ATTRIBUTE = &bus_entry_;
/* Internal helper Macros. */
diff --git a/src/lib/program.ld b/src/lib/program.ld index 6ffa82a..993037f 100644 --- a/src/lib/program.ld +++ b/src/lib/program.ld @@ -43,6 +43,11 @@ _cbmem_init_hooks = .; KEEP(*(.rodata.cbmem_init_hooks)); _ecbmem_init_hooks = .; + + . = ALIGN(ARCH_POINTER_ALIGN_SIZE); + _rsbe_init_begin = .; + KEEP(*(.rsbe_init)); + _ersbe_init_begin = .; #endif
#if ENV_RAMSTAGE diff --git a/src/lib/reg_script.c b/src/lib/reg_script.c index 7530dc3..9e20134 100644 --- a/src/lib/reg_script.c +++ b/src/lib/reg_script.c @@ -393,35 +393,27 @@ static void reg_script_write_msr(struct reg_script_context *ctx) #endif }
-#ifndef __PRE_RAM__ -/* Default routine provided for systems without platform specific busses */ -const struct reg_script_bus_entry *__attribute__((weak)) - platform_bus_table(size_t *table_entries) -{ - /* No platform bus type table supplied */ - *table_entries = 0; - return NULL; -} - /* Locate the structure containing the platform specific bus access routines */ static const struct reg_script_bus_entry *find_bus(const struct reg_script *step) { - const struct reg_script_bus_entry *bus; + extern const struct reg_script_bus_entry *_rsbe_init_begin[]; + extern const struct reg_script_bus_entry *_ersbe_init_begin[]; + const struct reg_script_bus_entry * const * bus; size_t table_entries; size_t i;
/* Locate the platform specific bus */ - bus = platform_bus_table(&table_entries); + bus = _rsbe_init_begin; + table_entries = &_ersbe_init_begin[0] - &_rsbe_init_begin[0]; for (i = 0; i < table_entries; i++) { - if (bus[i].type == step->type) - return &bus[i]; + if (bus[i]->type == step->type) + return bus[i]; }
/* Bus not found */ return NULL; } -#endif
static uint64_t reg_script_read(struct reg_script_context *ctx) { @@ -443,7 +435,6 @@ static uint64_t reg_script_read(struct reg_script_context *ctx) return reg_script_read_iosf(ctx); #endif /* HAS_IOSF */ default: -#ifndef __PRE_RAM__ { const struct reg_script_bus_entry *bus;
@@ -452,7 +443,6 @@ static uint64_t reg_script_read(struct reg_script_context *ctx) if (NULL != bus) return bus->reg_script_read(ctx); } -#endif printk(BIOS_ERR, "Unsupported read type (0x%x) for this device!\n", step->type); @@ -487,7 +477,6 @@ static void reg_script_write(struct reg_script_context *ctx) break; #endif /* HAS_IOSF */ default: -#ifndef __PRE_RAM__ { const struct reg_script_bus_entry *bus;
@@ -498,7 +487,6 @@ static void reg_script_write(struct reg_script_context *ctx) return; } } -#endif printk(BIOS_ERR, "Unsupported write type (0x%x) for this device!\n", step->type); diff --git a/src/soc/intel/braswell/iosf.c b/src/soc/intel/braswell/iosf.c index 98d1610..9a26757 100644 --- a/src/soc/intel/braswell/iosf.c +++ b/src/soc/intel/braswell/iosf.c @@ -190,16 +190,10 @@ void reg_script_write_iosf(struct reg_script_context *ctx) } }
-const struct reg_script_bus_entry reg_script_bus_table[] = { - {REG_SCRIPT_TYPE_IOSF, reg_script_read_iosf, reg_script_write_iosf} +static const struct reg_script_bus_entry reg_script_bus_table = { + REG_SCRIPT_TYPE_IOSF, reg_script_read_iosf, reg_script_write_iosf };
-const struct reg_script_bus_entry *platform_bus_table(size_t *table_entries) -{ - /* Return the table size and address */ - *table_entries = sizeof(reg_script_bus_table) - / sizeof(reg_script_bus_table[0]); - return ®_script_bus_table[0]; -} +REG_SCRIPT_BUS_ENTRY(reg_script_bus_table);
#endif /* ENV_RAMSTAGE */