Morgan Jang has uploaded this change for review.

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mb/ocp/deltalake: Override cache operation mode in SMBIOS type 7

TEST=Execute "dmidecode -t 7" to check if the cache operation
mode is correct for each cache level

Change-Id: I8d8d2b1c114b9c0c740841a9121d945adaea1d6c
Signed-off-by: Morgan Jang <Morgan_Jang@wiwynn.com>
---
M src/mainboard/ocp/deltalake/ramstage.c
1 file changed, 13 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/46116/1
diff --git a/src/mainboard/ocp/deltalake/ramstage.c b/src/mainboard/ocp/deltalake/ramstage.c
index e00f1c3..e546bd7 100644
--- a/src/mainboard/ocp/deltalake/ramstage.c
+++ b/src/mainboard/ocp/deltalake/ramstage.c
@@ -247,6 +247,19 @@
return 0x8c; /* BIT2 + BIT3 + BIT7 */
}

+unsigned int smbios_cache_conf_operation_mode(u8 level)
+{
+ switch (level) {
+ case 1:
+ return SMBIOS_CACHE_OP_MODE_WRITE_BACK;
+ case 2:
+ case 3:
+ return SMBIOS_CACHE_OP_MODE_VARIES_WITH_MEMORY_ADDRESS;
+ default:
+ return SMBIOS_CACHE_OP_MODE_UNKNOWN;
+ }
+}
+
static void mainboard_enable(struct device *dev)
{
dev->ops->get_smbios_strings = dl_oem_smbios_strings,

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I8d8d2b1c114b9c0c740841a9121d945adaea1d6c
Gerrit-Change-Number: 46116
Gerrit-PatchSet: 1
Gerrit-Owner: Morgan Jang <Morgan_Jang@wiwynn.com>
Gerrit-MessageType: newchange