Vladimir Serbinenko (phcoder@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5287
-gerrit
commit b6f42b39ce0e768f7d4fe5afa7f866347c6df302 Author: Vladimir Serbinenko phcoder@gmail.com Date: Sun Feb 23 14:17:03 2014 +0100
NOTFORMERGE: x60gfx: step 2
Change-Id: I91c5619d7c2a212a55e301733374de8b23f8aa1f Signed-off-by: Vladimir Serbinenko phcoder@gmail.com --- src/drivers/intel/gma/edid.c | 20 +- src/mainboard/lenovo/x60/Kconfig | 1 + src/mainboard/lenovo/x60/i915.c | 24 +- src/mainboard/lenovo/x60/i915io.c | 1614 ------------------------------------- src/northbridge/intel/i945/gma.c | 6 +- 5 files changed, 25 insertions(+), 1640 deletions(-)
diff --git a/src/drivers/intel/gma/edid.c b/src/drivers/intel/gma/edid.c index 0066b6a..15affd3 100644 --- a/src/drivers/intel/gma/edid.c +++ b/src/drivers/intel/gma/edid.c @@ -32,7 +32,7 @@ wait_rdy(u32 mmio) unsigned try = 100;
while (try--) { - if (read32(mmio + PCH_GMBUS2) & (1 << 11)) + if (read32(mmio + GMBUS2) & (1 << 11)) return; udelay(10); } @@ -45,29 +45,29 @@ intel_gmbus_read_edid(u32 mmio, u8 bus, u8 slave, u8 *edid)
wait_rdy(mmio); /* 100 KHz, hold 0ns, */ - write32(mmio + PCH_GMBUS0, bus); + write32(mmio + GMBUS0, bus); wait_rdy(mmio); /* Ensure index bits are disabled. */ - write32(mmio + PCH_GMBUS5, 0); - write32(mmio + PCH_GMBUS1, 0x46000000 | (slave << 1)); + write32(mmio + GMBUS5, 0); + write32(mmio + GMBUS1, 0x46000000 | (slave << 1)); wait_rdy(mmio); /* Ensure index bits are disabled. */ - write32(mmio + PCH_GMBUS5, 0); - write32(mmio + PCH_GMBUS1, 0x4a800001 | (slave << 1)); + write32(mmio + GMBUS5, 0); + write32(mmio + GMBUS1, 0x4a800001 | (slave << 1)); for (i = 0; i < 128 / 4; i++) { u32 reg32; wait_rdy(mmio); - reg32 = read32(mmio + PCH_GMBUS3); + reg32 = read32(mmio + GMBUS3); edid[4 * i] = reg32 & 0xff; edid[4 * i + 1] = (reg32 >> 8) & 0xff; edid[4 * i + 2] = (reg32 >> 16) & 0xff; edid[4 * i + 3] = (reg32 >> 24) & 0xff; } wait_rdy(mmio); - write32(mmio + PCH_GMBUS1, 0x4a800000 | (slave << 1)); + write32(mmio + GMBUS1, 0x4a800000 | (slave << 1)); wait_rdy(mmio); - write32(mmio + PCH_GMBUS0, 0x48000000); - write32(mmio + PCH_GMBUS2, 0x00008000); + write32(mmio + GMBUS0, 0x48000000); + write32(mmio + GMBUS2, 0x00008000);
printk (BIOS_INFO, "EDID:\n"); for (i = 0; i < 128; i++) { diff --git a/src/mainboard/lenovo/x60/Kconfig b/src/mainboard/lenovo/x60/Kconfig index 7ed2665..977d9e5 100644 --- a/src/mainboard/lenovo/x60/Kconfig +++ b/src/mainboard/lenovo/x60/Kconfig @@ -26,6 +26,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select MAINBOARD_HAS_NATIVE_VGA_INIT select EARLY_CBMEM_INIT select H8_DOCK_EARLY_INIT + select INTEL_EDID
config MAINBOARD_DIR string diff --git a/src/mainboard/lenovo/x60/i915.c b/src/mainboard/lenovo/x60/i915.c index 4870fd8..9c9dee0 100644 --- a/src/mainboard/lenovo/x60/i915.c +++ b/src/mainboard/lenovo/x60/i915.c @@ -43,6 +43,7 @@ #include <cpu/x86/msr.h> #include <edid.h> #include "i915io.h" +#include <drivers/intel/gma/edid.h>
enum { vmsg = 1, vio = 2, vspin = 4, @@ -64,16 +65,6 @@ static unsigned int physbase;
static u32 htotal, hblank, hsync, vtotal, vblank, vsync;
-const u8 x60_edid_data[] = { - 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x30, 0xae, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x0f, 0x01, 0x03, 0x80, 0x19, 0x12, 0x78, 0xea, 0xed, 0x75, 0x91, 0x57, 0x4f, 0x8b, 0x26, - 0x21, 0x50, 0x54, 0x21, 0x08, 0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, - 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x28, 0x15, 0x00, 0x40, 0x41, 0x00, 0x26, 0x30, 0x18, 0x88, - 0x36, 0x00, 0xf6, 0xb9, 0x00, 0x00, 0x00, 0x18, 0xed, 0x10, 0x00, 0x40, 0x41, 0x00, 0x26, 0x30, - 0x18, 0x88, 0x36, 0x00, 0xf6, 0xb9, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x61, - 0x43, 0x32, 0x61, 0x43, 0x28, 0x0f, 0x01, 0x00, 0x4c, 0xa3, 0x58, 0x4a, 0x00, 0x00, 0x00, 0xfe, - 0x00, 0x4c, 0x54, 0x4e, 0x31, 0x32, 0x31, 0x58, 0x4a, 0x2d, 0x4c, 0x30, 0x37, 0x0a, 0x00, 0x00, -}; #define READ32(addr) io_i915_READ32(addr) #define WRITE32(val, addr) io_i915_WRITE32(val, addr)
@@ -278,7 +269,9 @@ int i915lightup(unsigned int physbase, unsigned int iobase, unsigned int mmio, int i915lightup(unsigned int pphysbase, unsigned int piobase, unsigned int pmmio, unsigned int pgfx) { - static struct edid edid; + struct edid edid; + u8 x60_edid_data[256]; + int i, j;
int index; unsigned long temp; @@ -292,8 +285,8 @@ int i915lightup(unsigned int pphysbase, unsigned int piobase, (void *)graphics, mmio, addrport, physbase); globalstart = rdtscll();
- - decode_edid((unsigned char *)&x60_edid_data, + intel_gmbus_read_edid(pmmio, 3, 0x50, x60_edid_data); + decode_edid(x60_edid_data, sizeof(x60_edid_data), &edid);
htotal = (edid.ha - 1) | ((edid.ha + edid.hbl - 1) << 16); @@ -318,6 +311,11 @@ int i915lightup(unsigned int pphysbase, unsigned int piobase,
printk(BIOS_SPEW, "Table has %d elements\n", niodefs);
+ for (i = 0; i < 2; i++) + for (j = 0; j < 0x100; j++) + write32(pmmio + PALETTE(i) + 4 * j, 0x10101 * j); + + index = run(0); printk(BIOS_SPEW, "Run returns %d\n", index);
diff --git a/src/mainboard/lenovo/x60/i915io.c b/src/mainboard/lenovo/x60/i915io.c index 3552867..de1a893 100644 --- a/src/mainboard/lenovo/x60/i915io.c +++ b/src/mainboard/lenovo/x60/i915io.c @@ -61,84 +61,6 @@ struct iodef iodefs[] = { {M, 1, "vgaarb:device changed decodes:PCI:0000:00:02.0,olddecodes=io+mem,decodes=io+mem:owns=io+mem", 0x0, 0x0, 0}, {W, 1, "", VGACNTRL, VGA_DISP_DISABLE | 0x80000000, 0}, {R, 1, "", PFIT_CONTROL, 0x00000000, 0}, -{W, 1, "", 0x5100, 0x00000003, 0}, -{W, 1, "", 0x5104, 0x460100a1, 0}, -{R, 1, "", 0x5108, 0x00004a00, 0}, -{R, 1, "", 0x510c, 0x00000000, 0}, -{R, 1, "", 0x5108, 0x0000c200, 0}, -{W, 1, "", 0x5104, 0x48000000, 0}, -{R, 1, "", 0x5108, 0x00008800, 0}, -{W, 1, "", 0x5100, 0x00000000, 0}, -{W, 1, "", 0x5100, 0x00000003, 0}, -{W, 1, "", 0x5104, 0x468000a1, 0}, -{R, 1, "", 0x5108, 0x00008a08, 0}, -{R, 1, "", 0x510c, 0xffffff00, 0}, -{R, 1, "", 0x5108, 0x00008a0c, 0}, -{R, 1, "", 0x510c, 0x00ffffff, 0}, -{R, 1, "", 0x5108, 0x00008a10, 0}, -{R, 1, "", 0x510c, 0x4000ae30, 0}, -{R, 1, "", 0x5108, 0x00008a14, 0}, -{R, 1, "", 0x510c, 0x00000000, 0}, -{R, 1, "", 0x5108, 0x00008a18, 0}, -{R, 1, "", 0x510c, 0x03010f00, 0}, -{R, 1, "", 0x5108, 0x00008a1c, 0}, -{R, 1, "", 0x510c, 0x78121980, 0}, -{R, 1, "", 0x5108, 0x00008a20, 0}, -{R, 1, "", 0x510c, 0x9175edea, 0}, -{R, 1, "", 0x5108, 0x00008a24, 0}, -{R, 1, "", 0x510c, 0x268b4f57, 0}, -{R, 1, "", 0x5108, 0x00008a28, 0}, -{R, 1, "", 0x510c, 0x21545021, 0}, -{R, 1, "", 0x5108, 0x00008a2c, 0}, -{R, 1, "", 0x510c, 0x01010008, 0}, -{R, 1, "", 0x5108, 0x00008a30, 0}, -{R, 1, "", 0x510c, 0x01010101, 0}, -{R, 1, "", 0x5108, 0x00008a34, 0}, -{R, 1, "", 0x510c, 0x01010101, 0}, -{R, 1, "", 0x5108, 0x00008a38, 0}, -{R, 1, "", 0x510c, 0x01010101, 0}, -{R, 1, "", 0x5108, 0x00008a3c, 0}, -{R, 1, "", 0x510c, 0x15280101, 0}, -{R, 1, "", 0x5108, 0x00008a40, 0}, -{R, 1, "", 0x510c, 0x00414000, 0}, -{R, 1, "", 0x5108, 0x00008a44, 0}, -{R, 1, "", 0x510c, 0x88183026, 0}, -{R, 1, "", 0x5108, 0x00008a48, 0}, -{R, 1, "", 0x510c, 0xb9f60036, 0}, -{R, 1, "", 0x5108, 0x00008a4c, 0}, -{R, 1, "", 0x510c, 0x18000000, 0}, -{R, 1, "", 0x5108, 0x00008a50, 0}, -{R, 1, "", 0x510c, 0x400010ed, 0}, -{R, 1, "", 0x5108, 0x00008a54, 0}, -{R, 1, "", 0x510c, 0x30260041, 0}, -{R, 1, "", 0x5108, 0x00008a58, 0}, -{R, 1, "", 0x510c, 0x00368818, 0}, -{R, 1, "", 0x5108, 0x00008a5c, 0}, -{R, 1, "", 0x510c, 0x0000b9f6, 0}, -{R, 1, "", 0x5108, 0x00008a60, 0}, -{R, 1, "", 0x510c, 0x00001800, 0}, -{R, 1, "", 0x5108, 0x00008a64, 0}, -{R, 1, "", 0x510c, 0x61000f00, 0}, -{R, 1, "", 0x5108, 0x00008a68, 0}, -{R, 1, "", 0x510c, 0x43613243, 0}, -{R, 1, "", 0x5108, 0x00008a6c, 0}, -{R, 1, "", 0x510c, 0x00010f28, 0}, -{R, 1, "", 0x5108, 0x00008a70, 0}, -{R, 1, "", 0x510c, 0x4a58a34c, 0}, -{R, 1, "", 0x5108, 0x00008a74, 0}, -{R, 1, "", 0x510c, 0xfe000000, 0}, -{R, 1, "", 0x5108, 0x00008a78, 0}, -{R, 1, "", 0x510c, 0x4e544c00, 0}, -{R, 1, "", 0x5108, 0x00008a7c, 0}, -{R, 1, "", 0x510c, 0x58313231, 0}, -{R, 1, "", 0x5108, 0x0000ca00, 0}, -{R, 1, "", 0x510c, 0x304c2d4a, 0}, -{R, 1, "", 0x5108, 0x0000ca00, 0}, -{R, 1, "", 0x510c, 0x00000a37, 0}, -{R, 1, "", 0x5108, 0x0000c200, 0}, -{W, 1, "", 0x5104, 0x48000000, 0}, -{R, 1, "", 0x5108, 0x00008800, 0}, -{W, 1, "", 0x5100, 0x00000000, 0}, {R, 1, "", PP_CONTROL, 0x00000000, 0}, {W, 1, "", PP_CONTROL, 0xabcd0000, 0}, {R, 2, "", BLC_PWM_CTL, 0x00000000, 0}, @@ -517,262 +439,6 @@ struct iodef iodefs[] = { {W, 1, "", _PIPEASTAT, PIPE_VSYNC_INTERRUPT_STATUS | PIPE_VBLANK_INTERRUPT_STATUS | PIPE_OVERLAY_UPDATED_STATUS | 0x00000203, 0}, {R, 2, "", _PIPEASTAT, 0x00000000, 0}, {R, 1, "", _PIPEASTAT, PIPE_VSYNC_INTERRUPT_STATUS | PIPE_VBLANK_INTERRUPT_STATUS | PIPE_OVERLAY_UPDATED_STATUS | 0x00000203, 0}, -{W, 1, "", _PALETTE_A, 0x00000000, 0}, -{W, 1, "", _PALETTE_A+0x4, 0x00010101, 0}, -{W, 1, "", _PALETTE_A+0x8, 0x00020202, 0}, -{W, 1, "", _PALETTE_A+0xc, 0x00030303, 0}, -{W, 1, "", _PALETTE_A+0x10, 0x00040404, 0}, -{W, 1, "", _PALETTE_A+0x14, 0x00050505, 0}, -{W, 1, "", _PALETTE_A+0x18, 0x00060606, 0}, -{W, 1, "", _PALETTE_A+0x1c, 0x00070707, 0}, -{W, 1, "", _PALETTE_A+0x20, 0x00080808, 0}, -{W, 1, "", _PALETTE_A+0x24, 0x00090909, 0}, -{W, 1, "", _PALETTE_A+0x28, 0x000a0a0a, 0}, -{W, 1, "", _PALETTE_A+0x2c, 0x000b0b0b, 0}, -{W, 1, "", _PALETTE_A+0x30, 0x000c0c0c, 0}, -{W, 1, "", _PALETTE_A+0x34, 0x000d0d0d, 0}, -{W, 1, "", _PALETTE_A+0x38, 0x000e0e0e, 0}, -{W, 1, "", _PALETTE_A+0x3c, 0x000f0f0f, 0}, -{W, 1, "", _PALETTE_A+0x40, 0x00101010, 0}, -{W, 1, "", _PALETTE_A+0x44, 0x00111111, 0}, -{W, 1, "", _PALETTE_A+0x48, 0x00121212, 0}, -{W, 1, "", _PALETTE_A+0x4c, 0x00131313, 0}, -{W, 1, "", _PALETTE_A+0x50, 0x00141414, 0}, -{W, 1, "", _PALETTE_A+0x54, 0x00151515, 0}, -{W, 1, "", _PALETTE_A+0x58, 0x00161616, 0}, -{W, 1, "", _PALETTE_A+0x5c, 0x00171717, 0}, -{W, 1, "", _PALETTE_A+0x60, 0x00181818, 0}, -{W, 1, "", _PALETTE_A+0x64, 0x00191919, 0}, -{W, 1, "", _PALETTE_A+0x68, 0x001a1a1a, 0}, -{W, 1, "", _PALETTE_A+0x6c, 0x001b1b1b, 0}, -{W, 1, "", _PALETTE_A+0x70, 0x001c1c1c, 0}, -{W, 1, "", _PALETTE_A+0x74, 0x001d1d1d, 0}, -{W, 1, "", _PALETTE_A+0x78, 0x001e1e1e, 0}, -{W, 1, "", _PALETTE_A+0x7c, 0x001f1f1f, 0}, -{W, 1, "", 0xa080, 0x00202020, 0}, -{W, 1, "", 0xa084, 0x00212121, 0}, -{W, 1, "", 0xa088, 0x00222222, 0}, -{W, 1, "", 0xa08c, 0x00232323, 0}, -{W, 1, "", 0xa090, 0x00242424, 0}, -{W, 1, "", 0xa094, 0x00252525, 0}, -{W, 1, "", 0xa098, 0x00262626, 0}, -{W, 1, "", 0xa09c, 0x00272727, 0}, -{W, 1, "", 0xa0a0, 0x00282828, 0}, -{W, 1, "", 0xa0a4, 0x00292929, 0}, -{W, 1, "", 0xa0a8, 0x002a2a2a, 0}, -{W, 1, "", 0xa0ac, 0x002b2b2b, 0}, -{W, 1, "", 0xa0b0, 0x002c2c2c, 0}, -{W, 1, "", 0xa0b4, 0x002d2d2d, 0}, -{W, 1, "", 0xa0b8, 0x002e2e2e, 0}, -{W, 1, "", 0xa0bc, 0x002f2f2f, 0}, -{W, 1, "", 0xa0c0, 0x00303030, 0}, -{W, 1, "", 0xa0c4, 0x00313131, 0}, -{W, 1, "", 0xa0c8, 0x00323232, 0}, -{W, 1, "", 0xa0cc, 0x00333333, 0}, -{W, 1, "", 0xa0d0, 0x00343434, 0}, -{W, 1, "", 0xa0d4, 0x00353535, 0}, -{W, 1, "", 0xa0d8, 0x00363636, 0}, -{W, 1, "", 0xa0dc, 0x00373737, 0}, -{W, 1, "", 0xa0e0, 0x00383838, 0}, -{W, 1, "", 0xa0e4, 0x00393939, 0}, -{W, 1, "", 0xa0e8, 0x003a3a3a, 0}, -{W, 1, "", 0xa0ec, 0x003b3b3b, 0}, -{W, 1, "", 0xa0f0, 0x003c3c3c, 0}, -{W, 1, "", 0xa0f4, 0x003d3d3d, 0}, -{W, 1, "", 0xa0f8, 0x003e3e3e, 0}, -{W, 1, "", 0xa0fc, 0x003f3f3f, 0}, -{W, 1, "", 0xa100, 0x00404040, 0}, -{W, 1, "", 0xa104, 0x00414141, 0}, -{W, 1, "", 0xa108, 0x00424242, 0}, -{W, 1, "", 0xa10c, 0x00434343, 0}, -{W, 1, "", 0xa110, 0x00444444, 0}, -{W, 1, "", 0xa114, 0x00454545, 0}, -{W, 1, "", 0xa118, 0x00464646, 0}, -{W, 1, "", 0xa11c, 0x00474747, 0}, -{W, 1, "", 0xa120, 0x00484848, 0}, -{W, 1, "", 0xa124, 0x00494949, 0}, -{W, 1, "", 0xa128, 0x004a4a4a, 0}, -{W, 1, "", 0xa12c, 0x004b4b4b, 0}, -{W, 1, "", 0xa130, 0x004c4c4c, 0}, -{W, 1, "", 0xa134, 0x004d4d4d, 0}, -{W, 1, "", 0xa138, 0x004e4e4e, 0}, -{W, 1, "", 0xa13c, 0x004f4f4f, 0}, -{W, 1, "", 0xa140, 0x00505050, 0}, -{W, 1, "", 0xa144, 0x00515151, 0}, -{W, 1, "", 0xa148, 0x00525252, 0}, -{W, 1, "", 0xa14c, 0x00535353, 0}, -{W, 1, "", 0xa150, 0x00545454, 0}, -{W, 1, "", 0xa154, 0x00555555, 0}, -{W, 1, "", 0xa158, 0x00565656, 0}, -{W, 1, "", 0xa15c, 0x00575757, 0}, -{W, 1, "", 0xa160, 0x00585858, 0}, -{W, 1, "", 0xa164, 0x00595959, 0}, -{W, 1, "", 0xa168, 0x005a5a5a, 0}, -{W, 1, "", 0xa16c, 0x005b5b5b, 0}, -{W, 1, "", 0xa170, 0x005c5c5c, 0}, -{W, 1, "", 0xa174, 0x005d5d5d, 0}, -{W, 1, "", 0xa178, 0x005e5e5e, 0}, -{W, 1, "", 0xa17c, 0x005f5f5f, 0}, -{W, 1, "", 0xa180, 0x00606060, 0}, -{W, 1, "", 0xa184, 0x00616161, 0}, -{W, 1, "", FORCEWAKE_MT, 0x00626262, 0}, -{W, 1, "", FORCEWAKE, 0x00636363, 0}, -{W, 1, "", 0xa190, 0x00646464, 0}, -{W, 1, "", 0xa194, 0x00656565, 0}, -{W, 1, "", 0xa198, 0x00666666, 0}, -{W, 1, "", 0xa19c, 0x00676767, 0}, -{W, 1, "", 0xa1a0, 0x00686868, 0}, -{W, 1, "", 0xa1a4, 0x00696969, 0}, -{W, 1, "", 0xa1a8, 0x006a6a6a, 0}, -{W, 1, "", 0xa1ac, 0x006b6b6b, 0}, -{W, 1, "", 0xa1b0, 0x006c6c6c, 0}, -{W, 1, "", 0xa1b4, 0x006d6d6d, 0}, -{W, 1, "", 0xa1b8, 0x006e6e6e, 0}, -{W, 1, "", 0xa1bc, 0x006f6f6f, 0}, -{W, 1, "", 0xa1c0, 0x00707070, 0}, -{W, 1, "", 0xa1c4, 0x00717171, 0}, -{W, 1, "", 0xa1c8, 0x00727272, 0}, -{W, 1, "", 0xa1cc, 0x00737373, 0}, -{W, 1, "", 0xa1d0, 0x00747474, 0}, -{W, 1, "", 0xa1d4, 0x00757575, 0}, -{W, 1, "", 0xa1d8, 0x00767676, 0}, -{W, 1, "", 0xa1dc, 0x00777777, 0}, -{W, 1, "", 0xa1e0, 0x00787878, 0}, -{W, 1, "", 0xa1e4, 0x00797979, 0}, -{W, 1, "", 0xa1e8, 0x007a7a7a, 0}, -{W, 1, "", 0xa1ec, 0x007b7b7b, 0}, -{W, 1, "", 0xa1f0, 0x007c7c7c, 0}, -{W, 1, "", 0xa1f4, 0x007d7d7d, 0}, -{W, 1, "", 0xa1f8, 0x007e7e7e, 0}, -{W, 1, "", 0xa1fc, 0x007f7f7f, 0}, -{W, 1, "", 0xa200, 0x00808080, 0}, -{W, 1, "", 0xa204, 0x00818181, 0}, -{W, 1, "", 0xa208, 0x00828282, 0}, -{W, 1, "", 0xa20c, 0x00838383, 0}, -{W, 1, "", 0xa210, 0x00848484, 0}, -{W, 1, "", 0xa214, 0x00858585, 0}, -{W, 1, "", 0xa218, 0x00868686, 0}, -{W, 1, "", 0xa21c, 0x00878787, 0}, -{W, 1, "", 0xa220, 0x00888888, 0}, -{W, 1, "", 0xa224, 0x00898989, 0}, -{W, 1, "", 0xa228, 0x008a8a8a, 0}, -{W, 1, "", 0xa22c, 0x008b8b8b, 0}, -{W, 1, "", 0xa230, 0x008c8c8c, 0}, -{W, 1, "", 0xa234, 0x008d8d8d, 0}, -{W, 1, "", 0xa238, 0x008e8e8e, 0}, -{W, 1, "", 0xa23c, 0x008f8f8f, 0}, -{W, 1, "", 0xa240, 0x00909090, 0}, -{W, 1, "", 0xa244, 0x00919191, 0}, -{W, 1, "", 0xa248, 0x00929292, 0}, -{W, 1, "", 0xa24c, 0x00939393, 0}, -{W, 1, "", 0xa250, 0x00949494, 0}, -{W, 1, "", 0xa254, 0x00959595, 0}, -{W, 1, "", 0xa258, 0x00969696, 0}, -{W, 1, "", 0xa25c, 0x00979797, 0}, -{W, 1, "", 0xa260, 0x00989898, 0}, -{W, 1, "", 0xa264, 0x00999999, 0}, -{W, 1, "", 0xa268, 0x009a9a9a, 0}, -{W, 1, "", 0xa26c, 0x009b9b9b, 0}, -{W, 1, "", 0xa270, 0x009c9c9c, 0}, -{W, 1, "", 0xa274, 0x009d9d9d, 0}, -{W, 1, "", 0xa278, 0x009e9e9e, 0}, -{W, 1, "", 0xa27c, 0x009f9f9f, 0}, -{W, 1, "", 0xa280, 0x00a0a0a0, 0}, -{W, 1, "", 0xa284, 0x00a1a1a1, 0}, -{W, 1, "", 0xa288, 0x00a2a2a2, 0}, -{W, 1, "", 0xa28c, 0x00a3a3a3, 0}, -{W, 1, "", 0xa290, 0x00a4a4a4, 0}, -{W, 1, "", 0xa294, 0x00a5a5a5, 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1, "", 0xa3e4, 0x00f9f9f9, 0}, -{W, 1, "", 0xa3e8, 0x00fafafa, 0}, -{W, 1, "", 0xa3ec, 0x00fbfbfb, 0}, -{W, 1, "", 0xa3f0, 0x00fcfcfc, 0}, -{W, 1, "", 0xa3f4, 0x00fdfdfd, 0}, -{W, 1, "", 0xa3f8, 0x00fefefe, 0}, -{W, 1, "", 0xa3fc, 0x00ffffff, 0}, {R, 1, "", TV_CTL, 0x000c0000, 0}, {W, 1, "", TV_CTL, 0x800c0000, 0}, {R, 1, "", LVDS, 0x40000000, 0}, @@ -963,262 +629,6 @@ struct iodef iodefs[] = { {W, 1, "", _PIPEBSTAT, 0x00000202, 0}, {R, 3, "", _PIPEBSTAT, 0x00000000, 0}, {R, 1, "", _PIPEBSTAT, 0x00000202, 0}, -{W, 1, "", _PALETTE_B, 0x00000000, 0}, -{W, 1, "", _PALETTE_B+0x4, 0x00010101, 0}, -{W, 1, "", _PALETTE_B+0x8, 0x00020202, 0}, -{W, 1, "", _PALETTE_B+0xc, 0x00030303, 0}, -{W, 1, "", _PALETTE_B+0x10, 0x00040404, 0}, -{W, 1, "", _PALETTE_B+0x14, 0x00050505, 0}, -{W, 1, "", _PALETTE_B+0x18, 0x00060606, 0}, -{W, 1, "", _PALETTE_B+0x1c, 0x00070707, 0}, -{W, 1, "", _PALETTE_B+0x20, 0x00080808, 0}, -{W, 1, "", _PALETTE_B+0x24, 0x00090909, 0}, -{W, 1, "", _PALETTE_B+0x28, 0x000a0a0a, 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gma_func0_init(struct device *dev)
/* IGD needs to be Bus Master */ reg32 = pci_read_config32(dev, PCI_COMMAND); - pci_write_config32(dev, PCI_COMMAND, reg32 | PCI_COMMAND_MASTER); - + pci_write_config32(dev, PCI_COMMAND, reg32 | PCI_COMMAND_MASTER + | PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
#if !CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT /* PCI Init, will run VBIOS */ @@ -92,7 +92,7 @@ static void gma_func1_init(struct device *dev) /* IGD needs to be Bus Master, also enable IO accesss */ reg32 = pci_read_config32(dev, PCI_COMMAND); pci_write_config32(dev, PCI_COMMAND, reg32 | - PCI_COMMAND_MASTER | PCI_COMMAND_IO); + PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO);
if (get_option(&val, "tft_brightness") == CB_SUCCESS) pci_write_config8(dev, 0xf4, val);