Nico Huber uploaded patch set #2 to this change.
nb/intel/ironlake: Reserve gap betwen TSEG and BGSM
There may be a gap between TSEG and the graphics stolen memory due to
the alignment done in `raminit.c`. If we allocate MMIO resources in
this range, it misbehaves unpredictably, so reserve it.
TEST=Booted Thinkpad X201s, allocated resources are above TOLUD.
Change-Id: If305e9751ebf4edc945cf038ed72698f3696e52d
Signed-off-by: Nico Huber <nico.h@gmx.de>
---
M src/northbridge/intel/ironlake/northbridge.c
1 file changed, 7 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/45325/2
To view, visit change 45325. To unsubscribe, or for help writing mail filters, visit settings.