Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/52388 )
Change subject: mb/purism/librem_14: Remove all PU/PD from NC GPIO pads ......................................................................
mb/purism/librem_14: Remove all PU/PD from NC GPIO pads
When a pad is configured as NC, it is set as a GPI with both TX and RX disabled, and as the pad is internally disconnected, no pull up or pull down is needed.
Change-Id: Id551b8f6f5b8c772e17670b8b728b5e890ef0b21 Signed-off-by: Matt DeVillier matt.devillier@puri.sm Reviewed-on: https://review.coreboot.org/c/coreboot/+/52388 Reviewed-by: Michael Niewöhner foss@mniewoehner.de Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/purism/librem_cnl/variants/librem_14/gpio.c 1 file changed, 64 insertions(+), 64 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Michael Niewöhner: Looks good to me, approved
diff --git a/src/mainboard/purism/librem_cnl/variants/librem_14/gpio.c b/src/mainboard/purism/librem_cnl/variants/librem_14/gpio.c index df8332e..e39c888 100644 --- a/src/mainboard/purism/librem_cnl/variants/librem_14/gpio.c +++ b/src/mainboard/purism/librem_cnl/variants/librem_14/gpio.c @@ -41,10 +41,10 @@ PAD_CFG_NF(GPP_A10, DN_20K, DEEP, NF1),
/* GPP_A11 - NC */ - PAD_NC(GPP_A11, UP_20K), + PAD_NC(GPP_A11, NONE),
/* GPP_A12 - NC */ - PAD_NC(GPP_A12, UP_20K), + PAD_NC(GPP_A12, NONE),
/* GPP_A13 - NC */ PAD_NC(GPP_A13, NONE), @@ -56,7 +56,7 @@ PAD_NC(GPP_A15, NONE),
/* GPP_A16 - NC */ - PAD_NC(GPP_A16, UP_20K), + PAD_NC(GPP_A16, NONE),
/* GPP_A17 - NC */ PAD_NC(GPP_A17, NONE), @@ -71,13 +71,13 @@ PAD_NC(GPP_A20, NONE),
/* GPP_A21 - NC */ - PAD_NC(GPP_A21, UP_20K), + PAD_NC(GPP_A21, NONE),
/* GPP_A22 - NC */ - PAD_NC(GPP_A22, UP_20K), + PAD_NC(GPP_A22, NONE),
/* GPP_A23 - NC */ - PAD_NC(GPP_A23, UP_20K), + PAD_NC(GPP_A23, NONE),
/* ------- GPIO Group GPP_B ------- */
@@ -94,7 +94,7 @@ PAD_CFG_GPI_APIC_LOW(GPP_B3, NONE, PLTRST),
/* GPP_B4 - NC */ - PAD_NC(GPP_B4, UP_20K), + PAD_NC(GPP_B4, NONE),
/* GPP_B5 - SRCCLKREQ0# / SSD1 */ PAD_CFG_NF(GPP_B5, NONE, DEEP, NF1), @@ -109,10 +109,10 @@ PAD_CFG_NF(GPP_B8, NONE, DEEP, NF1),
/* GPP_B9 - NC */ - PAD_NC(GPP_B9, UP_20K), + PAD_NC(GPP_B9, NONE),
/* GPP_B10 - NC */ - PAD_NC(GPP_B10, UP_20K), + PAD_NC(GPP_B10, NONE),
/* GPP_B11 - NC */ PAD_NC(GPP_B11, NONE), @@ -145,7 +145,7 @@ PAD_NC(GPP_B20, NONE),
/* GPP_B21 - NC */ - PAD_NC(GPP_B21, UP_20K), + PAD_NC(GPP_B21, NONE),
/* GPP_B22 - NC */ PAD_NC(GPP_B22, NONE), @@ -182,19 +182,19 @@ /* ------- GPIO Group GPP_D ------- */
/* GPP_D0 - NC */ - PAD_NC(GPP_D0, UP_20K), + PAD_NC(GPP_D0, NONE),
/* GPP_D1 - NC */ - PAD_NC(GPP_D1, UP_20K), + PAD_NC(GPP_D1, NONE),
/* GPP_D2 - NC */ - PAD_NC(GPP_D2, UP_20K), + PAD_NC(GPP_D2, NONE),
/* GPP_D3 - NC */ - PAD_NC(GPP_D3, UP_20K), + PAD_NC(GPP_D3, NONE),
/* GPP_D4 - NC */ - PAD_NC(GPP_D4, UP_20K), + PAD_NC(GPP_D4, NONE),
/* GPP_D5 - ISH_I2C0_SDA */ PAD_CFG_NF(GPP_D5, NONE, DEEP, NF1), @@ -215,22 +215,22 @@ PAD_NC(GPP_D10, NONE),
/* GPP_D11 - NC */ - PAD_NC(GPP_D11, UP_20K), + PAD_NC(GPP_D11, NONE),
/* GPP_D12 - NC */ - PAD_NC(GPP_D12, UP_20K), + PAD_NC(GPP_D12, NONE),
/* GPP_D13 - NC */ PAD_NC(GPP_D13, NONE),
/* GPP_D14 - NC */ - PAD_NC(GPP_D14, UP_20K), + PAD_NC(GPP_D14, NONE),
/* GPP_D15 - NC */ - PAD_NC(GPP_D15, UP_20K), + PAD_NC(GPP_D15, NONE),
/* GPP_D16 - NC */ - PAD_NC(GPP_D16, UP_20K), + PAD_NC(GPP_D16, NONE),
/* GPP_D17 - DMIC_CLK1 */ PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1), @@ -245,13 +245,13 @@ PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),
/* GPP_D21 - NC */ - PAD_NC(GPP_D21, UP_20K), + PAD_NC(GPP_D21, NONE),
/* GPP_D22 - NC */ - PAD_NC(GPP_D22, UP_20K), + PAD_NC(GPP_D22, NONE),
/* GPP_D23 - NC */ - PAD_NC(GPP_D23, UP_20K), + PAD_NC(GPP_D23, NONE),
/* ------- GPIO Group GPP_F ------- */
@@ -259,19 +259,19 @@ PAD_NC(GPP_F0, NONE),
/* GPP_F1 - NC */ - PAD_NC(GPP_F1, UP_20K), + PAD_NC(GPP_F1, NONE),
/* GPP_F2 - NC */ - PAD_NC(GPP_F2, UP_20K), + PAD_NC(GPP_F2, NONE),
/* GPP_F3 - NC */ - PAD_NC(GPP_F3, UP_20K), + PAD_NC(GPP_F3, NONE),
/* GPP_F4 - NC */ - PAD_NC(GPP_F4, UP_20K), + PAD_NC(GPP_F4, NONE),
/* GPP_F5 - NC */ - PAD_NC(GPP_F5, UP_20K), + PAD_NC(GPP_F5, NONE),
/* GPP_F6 - NC */ PAD_NC(GPP_F6, NONE), @@ -286,46 +286,46 @@ PAD_NC(GPP_F9, NONE),
/* GPP_F10 - NC */ - PAD_NC(GPP_F10, UP_20K), + PAD_NC(GPP_F10, NONE),
/* GPP_F11 - NC */ - PAD_NC(GPP_F11, UP_20K), + PAD_NC(GPP_F11, NONE),
/* GPP_F12 - NC */ - PAD_NC(GPP_F12, UP_20K), + PAD_NC(GPP_F12, NONE),
/* GPP_F13 - NC */ - PAD_NC(GPP_F13, UP_20K), + PAD_NC(GPP_F13, NONE),
/* GPP_F14 - NC */ - PAD_NC(GPP_F14, UP_20K), + PAD_NC(GPP_F14, NONE),
/* GPP_F15 - NC */ - PAD_NC(GPP_F15, UP_20K), + PAD_NC(GPP_F15, NONE),
/* GPP_F16 - NC */ - PAD_NC(GPP_F16, UP_20K), + PAD_NC(GPP_F16, NONE),
/* GPP_F17 - NC */ - PAD_NC(GPP_F17, UP_20K), + PAD_NC(GPP_F17, NONE),
/* GPP_F18 - NC */ - PAD_NC(GPP_F18, UP_20K), + PAD_NC(GPP_F18, NONE),
/* GPP_F19 - NC */ - PAD_NC(GPP_F19, UP_20K), + PAD_NC(GPP_F19, NONE),
/* GPP_F20 - NC */ - PAD_NC(GPP_F20, UP_20K), + PAD_NC(GPP_F20, NONE),
/* GPP_F21 - NC */ - PAD_NC(GPP_F21, UP_20K), + PAD_NC(GPP_F21, NONE),
/* GPP_F22 - NC */ - PAD_NC(GPP_F22, UP_20K), + PAD_NC(GPP_F22, NONE),
/* GPP_F23 - NC */ - PAD_NC(GPP_F23, UP_20K), + PAD_NC(GPP_F23, NONE),
/* ------- GPIO Group GPP_H ------- */
@@ -348,7 +348,7 @@ PAD_NC(GPP_H5, NONE),
/* GPP_H6 - NC */ - PAD_NC(GPP_H6, UP_20K), + PAD_NC(GPP_H6, NONE),
/* GPP_H7 - NC */ PAD_NC(GPP_H7, NONE), @@ -366,19 +366,19 @@ PAD_NC(GPP_H11, NONE),
/* GPP_H12 - NC */ - PAD_NC(GPP_H12, UP_20K), + PAD_NC(GPP_H12, NONE),
/* GPP_H13 - NC */ - PAD_NC(GPP_H13, UP_20K), + PAD_NC(GPP_H13, NONE),
/* GPP_H14 - NC */ - PAD_NC(GPP_H14, UP_20K), + PAD_NC(GPP_H14, NONE),
/* GPP_H15 - NC */ - PAD_NC(GPP_H15, UP_20K), + PAD_NC(GPP_H15, NONE),
/* GPP_H16 - NC */ - PAD_NC(GPP_H16, UP_20K), + PAD_NC(GPP_H16, NONE),
/* GPP_H17 - NC */ PAD_NC(GPP_H17, NONE), @@ -387,16 +387,16 @@ PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1),
/* GPP_H19 - NC */ - PAD_NC(GPP_H19, UP_20K), + PAD_NC(GPP_H19, NONE),
/* GPP_H20 - NC */ - PAD_NC(GPP_H20, UP_20K), + PAD_NC(GPP_H20, NONE),
/* GPP_H21 - NC */ PAD_NC(GPP_H21, NONE),
/* GPP_H22 - NC */ - PAD_NC(GPP_H22, UP_20K), + PAD_NC(GPP_H22, NONE),
/* GPP_H23 - NC */ PAD_NC(GPP_H23, NONE), @@ -472,22 +472,22 @@ PAD_NC(GPP_C9, NONE),
/* GPP_C10 - NC */ - PAD_NC(GPP_C10, UP_20K), + PAD_NC(GPP_C10, NONE),
/* GPP_C11 - NC */ - PAD_NC(GPP_C11, UP_20K), + PAD_NC(GPP_C11, NONE),
/* GPP_C12 - NC */ - PAD_NC(GPP_C12, UP_20K), + PAD_NC(GPP_C12, NONE),
/* GPP_C13 - NC */ - PAD_NC(GPP_C13, UP_20K), + PAD_NC(GPP_C13, NONE),
/* GPP_C14 - NC */ - PAD_NC(GPP_C14, UP_20K), + PAD_NC(GPP_C14, NONE),
/* GPP_C15 - NC */ - PAD_NC(GPP_C15, UP_20K), + PAD_NC(GPP_C15, NONE),
/* GPP_C16 - I2C0_SDA - TP */ PAD_CFG_NF(GPP_C16, NONE, PLTRST, NF1), @@ -496,10 +496,10 @@ PAD_CFG_NF(GPP_C17, NONE, PLTRST, NF1),
/* GPP_C18 - NC */ - PAD_NC(GPP_C18, UP_20K), + PAD_NC(GPP_C18, NONE),
/* GPP_C19 - NC */ - PAD_NC(GPP_C19, UP_20K), + PAD_NC(GPP_C19, NONE),
/* GPP_C20 - NC */ PAD_NC(GPP_C20, NONE), @@ -516,7 +516,7 @@ /* ------- GPIO Group GPP_E ------- */
/* GPP_E0 - NC */ - PAD_NC(GPP_E0, UP_20K), + PAD_NC(GPP_E0, NONE),
/* GPP_E1 - SATAXPCIE1 */ PAD_CFG_NF(GPP_E1, UP_20K, PLTRST, NF1), @@ -534,13 +534,13 @@ PAD_CFG_NF(GPP_E5, NONE, DEEP, NF1),
/* GPP_E6 - NC */ - PAD_NC(GPP_E6, UP_20K), + PAD_NC(GPP_E6, NONE),
/* GPP_E7 - NC */ PAD_NC(GPP_E7, NONE),
/* GPP_E8 - NC */ - PAD_NC(GPP_E8, UP_20K), + PAD_NC(GPP_E8, NONE),
/* GPP_E9 - USB2_OC0# */ PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), @@ -570,7 +570,7 @@ PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1),
/* GPP_E18 - NC */ - PAD_NC(GPP_E18, UP_20K), + PAD_NC(GPP_E18, NONE),
/* GPP_E19 - NC */ PAD_NC(GPP_E19, NONE), @@ -582,7 +582,7 @@ PAD_NC(GPP_E21, NONE),
/* GPP_E22 - NC */ - PAD_NC(GPP_E22, UP_20K), + PAD_NC(GPP_E22, NONE),
/* GPP_E23 - NC */ PAD_NC(GPP_E23, NONE),