Arthur Heymans has uploaded this change for review.

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cpu/x86/mtrr.h: Rename CORE2 alternative SMRR registers

It is too easy to confuse those with IA32_SMRR_PHYS_x registers.

Change-Id: Ice02ab6c0315a2be14ef110ede506262e3c0a4d5
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
---
M src/cpu/intel/smm/gen1/smmrelocate.c
M src/include/cpu/x86/mtrr.h
2 files changed, 6 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/46896/1
diff --git a/src/cpu/intel/smm/gen1/smmrelocate.c b/src/cpu/intel/smm/gen1/smmrelocate.c
index ae2440d..36884a1 100644
--- a/src/cpu/intel/smm/gen1/smmrelocate.c
+++ b/src/cpu/intel/smm/gen1/smmrelocate.c
@@ -59,8 +59,8 @@
printk(BIOS_DEBUG, "Writing SMRR. base = 0x%08x, mask=0x%08x\n",
relo_params->smrr_base.lo, relo_params->smrr_mask.lo);

- wrmsr(MSR_SMRR_PHYS_BASE, relo_params->smrr_base);
- wrmsr(MSR_SMRR_PHYS_MASK, relo_params->smrr_mask);
+ wrmsr(CORE2_SMRR_PHYS_BASE, relo_params->smrr_base);
+ wrmsr(CORE2_SMRR_PHYS_MASK, relo_params->smrr_mask);
}

static void fill_in_relocation_params(struct smm_relocation_params *params)
diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h
index 3bf8301c..a96f17f 100644
--- a/src/include/cpu/x86/mtrr.h
+++ b/src/include/cpu/x86/mtrr.h
@@ -31,9 +31,10 @@
#define IA32_SMRR_PHYS_MASK 0x1f3
#define SMRR_PHYS_MASK_LOCK (1 << 10)

-/* Specific to model_6fx and model_1067x */
-#define MSR_SMRR_PHYS_BASE 0xa0
-#define MSR_SMRR_PHYS_MASK 0xa1
+/* Specific to model_6fx and model_1067x.
+ Those are named MSR_SMRR_PHYSBASE in the SDM. */
+#define CORE2_SMRR_PHYS_BASE 0xa0
+#define CORE2_SMRR_PHYS_MASK 0xa1

#define MTRR_PHYS_BASE(reg) (0x200 + 2 * (reg))
#define MTRR_PHYS_MASK(reg) (MTRR_PHYS_BASE(reg) + 1)

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ice02ab6c0315a2be14ef110ede506262e3c0a4d5
Gerrit-Change-Number: 46896
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz>
Gerrit-MessageType: newchange