Patrick Georgi submitted this change.

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soc/intel: Add a driver for CNVi WiFi/BT controllers

This change adds a common block driver for CNVi WiFi/BT controllers in
Intel SoCs. This driver uses the common PCI dev operations in addition
to generating ACPI device node and returning ACPI name for the
controller device.

This change also selects this driver for CML, GLK, ICL, JSL and TGL.

Change-Id: I69a832be918d4b9f4fbe3a40913d4542a457a77c
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46864
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
---
M src/soc/intel/apollolake/Kconfig
M src/soc/intel/cannonlake/Kconfig
A src/soc/intel/common/block/cnvi/Kconfig
A src/soc/intel/common/block/cnvi/Makefile.inc
A src/soc/intel/common/block/cnvi/cnvi.c
M src/soc/intel/icelake/Kconfig
M src/soc/intel/jasperlake/Kconfig
M src/soc/intel/tigerlake/Kconfig
8 files changed, 84 insertions(+), 0 deletions(-)

diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index 69d42bd..0c8eae2 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -7,6 +7,7 @@
 	bool
 	default n
 	select SOC_INTEL_APOLLOLAKE
+	select SOC_INTEL_COMMON_BLOCK_CNVI
 	select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
 	select SOC_INTEL_COMMON_BLOCK_SGX
 	select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 24f64b1..5149274 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -103,6 +103,7 @@
 	select SOC_INTEL_COMMON_BLOCK
 	select SOC_INTEL_COMMON_BLOCK_ACPI
 	select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
+	select SOC_INTEL_COMMON_BLOCK_CNVI
 	select SOC_INTEL_COMMON_BLOCK_CPU
 	select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
 	select SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT
diff --git a/src/soc/intel/common/block/cnvi/Kconfig b/src/soc/intel/common/block/cnvi/Kconfig
new file mode 100644
index 0000000..21402ab
--- /dev/null
+++ b/src/soc/intel/common/block/cnvi/Kconfig
@@ -0,0 +1,4 @@
+config SOC_INTEL_COMMON_BLOCK_CNVI
+	bool
+	help
+	  Common CNVI module for Intel PCH
diff --git a/src/soc/intel/common/block/cnvi/Makefile.inc b/src/soc/intel/common/block/cnvi/Makefile.inc
new file mode 100644
index 0000000..01b9d1d
--- /dev/null
+++ b/src/soc/intel/common/block/cnvi/Makefile.inc
@@ -0,0 +1 @@
+ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CNVI) += cnvi.c
diff --git a/src/soc/intel/common/block/cnvi/cnvi.c b/src/soc/intel/common/block/cnvi/cnvi.c
new file mode 100644
index 0000000..0dafb82
--- /dev/null
+++ b/src/soc/intel/common/block/cnvi/cnvi.c
@@ -0,0 +1,74 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpi_device.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+
+static const char *cnvi_wifi_acpi_name(const struct device *dev)
+{
+	return "CNVW";
+}
+
+static struct device_operations cnvi_wifi_ops = {
+	.read_resources		= pci_dev_read_resources,
+	.set_resources		= pci_dev_set_resources,
+	.enable_resources	= pci_dev_enable_resources,
+	.ops_pci		= &pci_dev_ops_pci,
+	.scan_bus		= scan_static_bus,
+	.acpi_name		= cnvi_wifi_acpi_name,
+	.acpi_fill_ssdt		= acpi_device_write_pci_dev,
+};
+
+static const unsigned short wifi_pci_device_ids[] = {
+	PCI_DEVICE_ID_INTEL_CML_LP_CNVI_WIFI,
+	PCI_DEVICE_ID_INTEL_CML_H_CNVI_WIFI,
+	PCI_DEVICE_ID_INTEL_CNL_LP_CNVI_WIFI,
+	PCI_DEVICE_ID_INTEL_CNL_H_CNVI_WIFI,
+	PCI_DEVICE_ID_INTEL_GLK_CNVI_WIFI,
+	PCI_DEVICE_ID_INTEL_ICL_CNVI_WIFI,
+	PCI_DEVICE_ID_INTEL_JSL_CNVI_WIFI_0,
+	PCI_DEVICE_ID_INTEL_JSL_CNVI_WIFI_1,
+	PCI_DEVICE_ID_INTEL_JSL_CNVI_WIFI_2,
+	PCI_DEVICE_ID_INTEL_JSL_CNVI_WIFI_3,
+	PCI_DEVICE_ID_INTEL_TGL_CNVI_WIFI_0,
+	PCI_DEVICE_ID_INTEL_TGL_CNVI_WIFI_1,
+	PCI_DEVICE_ID_INTEL_TGL_CNVI_WIFI_2,
+	PCI_DEVICE_ID_INTEL_TGL_CNVI_WIFI_3,
+	0
+};
+
+static const struct pci_driver pch_cnvi_wifi __pci_driver = {
+	.ops			= &cnvi_wifi_ops,
+	.vendor			= PCI_VENDOR_ID_INTEL,
+	.devices		= wifi_pci_device_ids,
+};
+
+static const char *cnvi_bt_acpi_name(const struct device *dev)
+{
+	return "CNVB";
+}
+
+static struct device_operations cnvi_bt_ops = {
+	.read_resources		= pci_dev_read_resources,
+	.set_resources		= pci_dev_set_resources,
+	.enable_resources	= pci_dev_enable_resources,
+	.ops_pci		= &pci_dev_ops_pci,
+	.scan_bus		= scan_static_bus,
+	.acpi_name		= cnvi_bt_acpi_name,
+	.acpi_fill_ssdt		= acpi_device_write_pci_dev,
+};
+
+static const unsigned short bt_pci_device_ids[] = {
+	PCI_DEVICE_ID_INTEL_TGL_CNVI_BT_0,
+	PCI_DEVICE_ID_INTEL_TGL_CNVI_BT_1,
+	PCI_DEVICE_ID_INTEL_TGL_CNVI_BT_2,
+	PCI_DEVICE_ID_INTEL_TGL_CNVI_BT_3,
+	0
+};
+
+static const struct pci_driver pch_cnvi_bt __pci_driver = {
+	.ops			= &cnvi_bt_ops,
+	.vendor			= PCI_VENDOR_ID_INTEL,
+	.devices		= bt_pci_device_ids,
+};
diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig
index 3b3d479..464a11b 100644
--- a/src/soc/intel/icelake/Kconfig
+++ b/src/soc/intel/icelake/Kconfig
@@ -41,6 +41,7 @@
 	select SOC_INTEL_COMMON_BLOCK
 	select SOC_INTEL_COMMON_BLOCK_ACPI
 	select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
+	select SOC_INTEL_COMMON_BLOCK_CNVI
 	select SOC_INTEL_COMMON_BLOCK_CPU
 	select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
 	select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2
diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig
index d5adc60..4ea0837 100644
--- a/src/soc/intel/jasperlake/Kconfig
+++ b/src/soc/intel/jasperlake/Kconfig
@@ -39,6 +39,7 @@
 	select SOC_INTEL_COMMON_BLOCK
 	select SOC_INTEL_COMMON_BLOCK_ACPI
 	select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
+	select SOC_INTEL_COMMON_BLOCK_CNVI
 	select SOC_INTEL_COMMON_BLOCK_CPU
 	select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
 	select SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT
diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
index 9eb229e..7959526 100644
--- a/src/soc/intel/tigerlake/Kconfig
+++ b/src/soc/intel/tigerlake/Kconfig
@@ -40,6 +40,7 @@
 	select SOC_INTEL_COMMON_BLOCK
 	select SOC_INTEL_COMMON_BLOCK_ACPI
 	select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
+	select SOC_INTEL_COMMON_BLOCK_CNVI
 	select SOC_INTEL_COMMON_BLOCK_CPU
 	select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
 	select SOC_INTEL_COMMON_BLOCK_DTT

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