Ravi kumar would like mturney mturney to review this change.

View Change

Herobrine T32 scripts working in standalone environment

Change-Id: I451344d887c7b6c0983594e4dea4ca2b030d65f1
---
M util/qualcomm/scripts/cmm/debug_cb_common.cmm
A util/qualcomm/scripts/cmm/debug_cb_herobrine.cmm
2 files changed, 123 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/47365/1
diff --git a/util/qualcomm/scripts/cmm/debug_cb_common.cmm b/util/qualcomm/scripts/cmm/debug_cb_common.cmm
index cbcb004..a722864 100644
--- a/util/qualcomm/scripts/cmm/debug_cb_common.cmm
+++ b/util/qualcomm/scripts/cmm/debug_cb_common.cmm
@@ -126,6 +126,11 @@
else
d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath /nocode

+ print "Hacking DDR ranges..."
+ B::D.S MD:0x1485B000 %LE %Long 0x80000000
+ B::D.S MD:0x1485B004 %LE %Long 0
+ B::D.S MD:0x1485B008 %LE %Long 0x80000000
+
print %String "Now the control is in ROMStage, press enter after debugging to go to next stage"
print %String "Press enter to go to next stage"
enter
diff --git a/util/qualcomm/scripts/cmm/debug_cb_herobrine.cmm b/util/qualcomm/scripts/cmm/debug_cb_herobrine.cmm
new file mode 100644
index 0000000..8693a5f
--- /dev/null
+++ b/util/qualcomm/scripts/cmm/debug_cb_herobrine.cmm
@@ -0,0 +1,118 @@
+;============================================================================
+;## SPDX-License-Identifier: GPL-2.0-only
+;============================================================================
+; Name:
+; debug_cb_trogdor.cmm
+;
+; Description:
+; Debug coreboot trogdor front-end
+;============================================================================
+
+;============================================================================
+; CMM script variables
+;============================================================================
+
+LOCAL &TargetPkg
+
+GLOBAL &BBEntryAddr // Bootblock Entry
+GLOBAL &BBExitAddr // Bootblock Exit to Xbl-Sec
+GLOBAL &VEREntryAddr // Verstage Entry
+GLOBAL &ROMEntryAddr // Romstage Entry
+GLOBAL &QCLEntryAddr // QCLstage Entry
+GLOBAL &RAMEntryAddr // Ramstage Entry
+GLOBAL &BL31EntryAddr // BL31 Entry
+GLOBAL &DCEntryAddr // Depthcharge Entry
+
+GLOBAL &PreRamConsoleAddr
+GLOBAL &RamConsoleAddr
+GLOBAL &PreRamCbfsCache
+GLOBAL &VBoot2Work
+GLOBAL &Stack
+GLOBAL &Ttb
+GLOBAL &Timestamp
+GLOBAL &CbmemTop
+GLOBAL &PostRamCbfsCache
+
+GLOBAL &CBTablePtr
+
+;============================================================================
+
+;---------------------------------------------------
+; Entry point
+;---------------------------------------------------
+ENTRY &ImageName &RegAddress
+
+ // Later these can be parameterized
+ &TargetPkg="herobrinePkg"
+
+ // These settings come from .../src/soc/qualcomm/sc7280/memlayout.ld
+ &BBEntryAddr=0x14819000
+ &VEREntryAddr=0x14680000
+ &ROMEntryAddr=0x14680000
+ &QCLEntryAddr=0x1486c950
+ &RAMEntryAddr=0xA0800000
+ &BL31EntryAddr=0x80C00000
+ &DCEntryAddr=0xF1000000
+ &KernelEntryAddr=0xD0000000
+
+ &PreRamConsoleAddr=0x14834800
+ &VBoot2Work=0x1484F000
+ &Stack=0x1484B000
+ &Ttb=0x1483D000
+ &Timestamp=0x1483C800
+ &PreRamCbfsCache=0x14823000
+ &CbmemTop=0x280000000
+ &PostRamCbfsCache=0x9F800000
+ // End of memlayout.ld settings
+
+ // Common commands irrespective of &Mode
+ PATH
+ &CwDir=os.pwd()
+ PATH + &CwDir
+
+ // position at top of coreboot tree
+ // find depth count for source loading
+ cd ..\..\..\..
+ &srcpath=os.pwd()
+
+
+;---------------------------------------------------
+; Setup area and log
+;---------------------------------------------------
+ area.clear
+ area.reset
+ area.create CB_Logs 1000. 8192.
+ area.select CB_Logs
+
+ area.view CB_Logs
+
+ PRINT %String "Source Path: &srcpath"
+
+ symbol.sourcepath.setbasedir &srcpath\src
+
+ // Make parsing simple, upper-case parameters
+ &ImageName=STRING.UPR("&ImageName")
+ if (STR.CP("&ImageName","0X*"))
+ (
+ &RegAddress=&ImageName
+ &ImageName=""
+ )
+ &RegAddress=STRING.UPR("&RegAddress")
+
+ PRINT %String "ImageName: &ImageName"
+ PRINT %String "RegAddress: &RegAddress"
+
+ ;sys.d
+ ;sys.up
+ b.d
+ y.reset
+
+ if (STR.CP("&RegAddress","0X*"))
+ D.S EZAXI:&RegAddress %LE %Long 0x80000000
+
+ go &BBEntryAddr
+ wait !run()
+
+ DO debug_cb_common.cmm &TargetPkg &srcpath &xblsrcpath &ImageName
+
+ enddo

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I451344d887c7b6c0983594e4dea4ca2b030d65f1
Gerrit-Change-Number: 47365
Gerrit-PatchSet: 1
Gerrit-Owner: Ravi kumar <rbokka@codeaurora.org>
Gerrit-Reviewer: mturney mturney <mturney@codeaurora.org>
Gerrit-MessageType: newchange