Patch Set 7:

Patch Set 7:

Patch Set 7:

Looks like this improves loading postcar stage with ~1ms. Thanks for testing.

Which timestamps exactly did you compare? It looked like 22ms overall increment to me.

The difference between '3:after ram initialization' and '100:start of postcar' which this change affects.

1ms improvement is just noise here in my opinion, specially when adding new dependency on having AGESA do MTRR setups.

I think we already mostly keep AGESA's MTRR setup be we work around it by using more MTRR's: UC on regular boot to make sure cbmem hits memory before invd in postcar and WB on S3 resume to speed up things.

1ms on ~14ms is indeed just noise here. The advantages are:

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I62ffe1bd646e9ddad77be240f030601790f4da4b
Gerrit-Change-Number: 37198
Gerrit-PatchSet: 7
Gerrit-Owner: Arthur Heymans <>
Gerrit-Reviewer: Marshall Dawson <>
Gerrit-Reviewer: Michał Żygowski <>
Gerrit-Reviewer: build bot (Jenkins) <>
Gerrit-CC: Krystian Hebel <>
Gerrit-CC: Kyösti Mälkki <>
Gerrit-CC: Mike Banon <>
Gerrit-CC: Paul Menzel <>
Gerrit-Comment-Date: Thu, 28 May 2020 22:17:13 +0000
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