[coreboot-gerrit] Change in coreboot[master]: mb/google/poppy/variant/nocturne: fix EC_SYNC_IRQ definition

[Nick Vaccaro (Code Review)]

Nick Vaccaro has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35174 )

Change subject: mb/google/poppy/variant/nocturne: fix EC_SYNC_IRQ definition
......................................................................

mb/google/poppy/variant/nocturne: fix EC_SYNC_IRQ definition

Setup EC_PCH_ARCORE_INT_L, tied to GPP_D17, as the EC_SYNC_IRQ line.

- change GPP_D17 definition to PAD_CFG_GPI_APIC_INVERT as
   EC_PCH_ARCORE_INT_L is active low

- enable itss for inverting the EC_SYNC_IRQ gpio for the APIC

- add EC_SYNC_IRQ to the group of chromeos_gpios for use by depthcharge

- change incorrect EC_SYNC_IRQ define from GPP_D17_IRQ to GPP_D17

BUG=b:139384979
BRANCH=none
TEST="emerge_nocturne coreboot depthcharge chromeos-bootimage",
flash & boot nocturne in dev mode, verify that volume up and down
buttons work in the dev screen and that the device boots properly into
the kernel.

Change-Id: Ia43c622710fde8686c60b836fb8318931d79eb61
Signed-off-by: Nick Vaccaro 
---
M src/mainboard/google/poppy/Kconfig
M src/mainboard/google/poppy/chromeos.c
M src/mainboard/google/poppy/variants/nocturne/gpio.c
M src/mainboard/google/poppy/variants/nocturne/include/variant/gpio.h
4 files changed, 7 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/35174/1

diff --git a/src/mainboard/google/poppy/Kconfig b/src/mainboard/google/poppy/Kconfig
index fda8c9e..8952a5f 100644
--- a/src/mainboard/google/poppy/Kconfig
+++ b/src/mainboard/google/poppy/Kconfig
@@ -194,6 +194,7 @@
    select NO_FADT_8042
    select VARIANT_HAS_CAMERA_ACPI
    select GEO_SAR_ENABLE if CHROMEOS_WIFI_SAR
+	select SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG

config VARIANT_SPECIFIC_OPTIONS_RAMMUS
    def_bool n
diff --git a/src/mainboard/google/poppy/chromeos.c b/src/mainboard/google/poppy/chromeos.c
index 84b0031..b72e40c 100644
--- a/src/mainboard/google/poppy/chromeos.c
+++ b/src/mainboard/google/poppy/chromeos.c
@@ -32,6 +32,9 @@
    	{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
    	{GPIO_EC_IN_RW, ACTIVE_HIGH, gpio_get(GPIO_EC_IN_RW),
    	 "EC in RW"},
+#if CONFIG_BOARD_GOOGLE_NOCTURNE
+		{EC_SYNC_IRQ, ACTIVE_LOW, gpio_get(EC_SYNC_IRQ), "EC sync irq"},
+#endif
    };
    lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
 }
diff --git a/src/mainboard/google/poppy/variants/nocturne/gpio.c b/src/mainboard/google/poppy/variants/nocturne/gpio.c
index c62317a..a4ea3c3 100644
--- a/src/mainboard/google/poppy/variants/nocturne/gpio.c
+++ b/src/mainboard/google/poppy/variants/nocturne/gpio.c
@@ -196,7 +196,7 @@
    /* D16 : ISH_UART0_CTS# ==> RCAM_RST_L */
    PAD_CFG_GPO(GPP_D16, 0, DEEP),
    /* D17 : DMIC_CLK1 ==> EC_PCH_ARCORE_INT_L */
-	PAD_CFG_GPI_APIC(GPP_D17, NONE, PLTRST),
+	PAD_CFG_GPI_APIC_INVERT(GPP_D17, NONE, PLTRST),
    /* D18 : DMIC_DATA1 ==> TP131 */
    PAD_CFG_NC(GPP_D18),
    /* D19 : DMIC_CLK0 ==> PCH_DMIC_CLK_OUT */
diff --git a/src/mainboard/google/poppy/variants/nocturne/include/variant/gpio.h b/src/mainboard/google/poppy/variants/nocturne/include/variant/gpio.h
index fb7ad1a..105e158 100644
--- a/src/mainboard/google/poppy/variants/nocturne/include/variant/gpio.h
+++ b/src/mainboard/google/poppy/variants/nocturne/include/variant/gpio.h
@@ -34,8 +34,8 @@
 /* EC wake is LAN_WAKE# which is a special DeepSX wake pin */
 #define GPE_EC_WAKE		GPE0_LAN_WAK

-/* EC sync irq is GPP_D12 */
-#define EC_SYNC_IRQ		GPP_D17_IRQ
+/* EC sync irq is GPP_D17 */
+#define EC_SYNC_IRQ		GPP_D17

/* eSPI virtual wire reporting */
 #define EC_SCI_GPI		GPE0_ESPI