Subrata Banik uploaded patch set #8 to this change.

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soc/intel/common/systemagent: Make common northbridge.asl

This patch make common northbridge.asl based on System Agent (SA) register
analysis between SKL till TGL.

Major delta are 0x48:MCHBAR and 0x60:PCIEXBAR register LENGTH offset definition
has been changed for each SoC.

This change provides a new Kconfig option that can be selected by SoCs using
these new bit definitions of PCIEXBAR.LENGTH and MCHBAR.

Common code takes care of setting the right value for mchbar and pciex length
depending upon those Kconfig.

TEST=DSDT dump shows PCIEXBAR.LENGTH offset (3:1) for TGL

Change-Id: Ifa00c4e6b872896ace975f1c6bd56c6efb172410
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
---
M src/mainboard/asrock/h110m/dsdt.asl
M src/mainboard/facebook/monolith/dsdt.asl
M src/mainboard/google/eve/dsdt.asl
M src/mainboard/google/fizz/dsdt.asl
M src/mainboard/google/glados/dsdt.asl
M src/mainboard/google/poppy/dsdt.asl
M src/mainboard/intel/kblrvp/dsdt.asl
M src/mainboard/intel/kunimitsu/dsdt.asl
M src/mainboard/intel/saddlebrook/dsdt.asl
M src/mainboard/purism/librem_skl/dsdt.asl
M src/mainboard/razer/blade_stealth_kbl/dsdt.asl
M src/mainboard/supermicro/x11-lga1151-series/dsdt.asl
M src/soc/intel/cannonlake/Kconfig
M src/soc/intel/common/block/acpi/acpi/northbridge.asl
M src/soc/intel/common/block/systemagent/Kconfig
M src/soc/intel/common/block/systemagent/systemagent_def.h
M src/soc/intel/common/block/systemagent/systemagent_early.c
M src/soc/intel/icelake/Kconfig
D src/soc/intel/skylake/acpi/systemagent.asl
M src/soc/intel/tigerlake/Kconfig
20 files changed, 145 insertions(+), 362 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/38456/8

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