[coreboot-gerrit] [L] Change in coreboot[main]: soc/intel/xeon_sp: Redesign resource allocation

[Shuo Liu (Code Review)]

Attention is currently required from: Arthur Heymans, Christian Walter, David Hendricks, Felix Held, Nico Huber, Nill Ge, Patrick Rudolph, Paul Menzel, TangYiwei, Tim Chu.

Shuo Liu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78327?usp=email )

Change subject: soc/intel/xeon_sp: Redesign resource allocation
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Patch Set 4: Code-Review+1

(1 comment)

File src/soc/intel/xeon_sp/chip_common.c:

https://review.coreboot.org/c/coreboot/+/78327/comment/ccb60e41_8988a76a :
PS4, Line 18: MAX_IIO_STACK
> Here comes the fun: SKX uses MAX_IIO_STACK to size this, but CPX on use […]

In GNR, we use MAX_LOGICAL_IIO_STACK. MAX_LOGICAL_IIO_STACK will enumerate UBOX buses but MAX_IIO_STACK will not. We use MAX_LOGICAL_IIO_STACK for 2 reasons:

1) in case UBOX is needed for some special setting needs in bootloader.
2) for simplicity reason, only one range is used instead of using both.