Felix Held has uploaded this change for review.

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soc/amd/*/include/spc/gpio: fix pin numbers in comments

Change-Id: I9e91f28659c49927aaa4c7cd67f73bb11258c27c
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
---
M src/soc/amd/picasso/include/soc/gpio.h
M src/soc/amd/stoneyridge/include/soc/gpio.h
2 files changed, 4 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/48563/1

diff --git a/src/soc/amd/picasso/include/soc/gpio.h b/src/soc/amd/picasso/include/soc/gpio.h
index 4fbb937..8f33ca6 100644
--- a/src/soc/amd/picasso/include/soc/gpio.h
+++ b/src/soc/amd/picasso/include/soc/gpio.h
@@ -14,7 +14,7 @@
 
 #define SOC_GPIO_TOTAL_PINS		145
 
-/* Bank 0: GPIO_0 - GPIO_62 */
+/* Bank 0: GPIO_0 - GPIO_63 */
 #define GPIO_0				0
 #define GPIO_1				1
 #define GPIO_2				2
@@ -79,7 +79,7 @@
 #define GPIO_120			120
 #define GPIO_121			121
 
-/* Bank 2: GPIO_128 - GPIO_183 */
+/* Bank 2: GPIO_128 - GPIO_191 */
 #define GPIO_129			129
 #define GPIO_130			130
 #define GPIO_131			131
diff --git a/src/soc/amd/stoneyridge/include/soc/gpio.h b/src/soc/amd/stoneyridge/include/soc/gpio.h
index 8bfb1f6..714d219 100644
--- a/src/soc/amd/stoneyridge/include/soc/gpio.h
+++ b/src/soc/amd/stoneyridge/include/soc/gpio.h
@@ -14,7 +14,7 @@
 
 #define SOC_GPIO_TOTAL_PINS		149
 
-/* Bank 0: GPIO_0 - GPIO_62 */
+/* Bank 0: GPIO_0 - GPIO_63 */
 #define GPIO_0				0
 #define GPIO_1				1
 #define GPIO_2				2
@@ -89,7 +89,7 @@
 #define GPIO_122			122
 #define GPIO_126			126
 
-/* Bank 2: GPIO_128 - GPIO_183 */
+/* Bank 2: GPIO_128 - GPIO_191 */
 #define GPIO_129			129
 #define GPIO_130			130
 #define GPIO_131			131

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