1 comment:
File src/soc/intel/cannonlake/chip.h:
/* Boot Frequency from reset vector.
* 0: Maximum battery performance, 1: Maximum non-turbo performance, 2:
* Maximum turbo performance @note If 2 is selected, system will start
* with non-turbo mode and then switch to turbo. */
uint8_t bootfreq;
coreboots job is booting ASAP and who cares about power saving when its for a period of half a secon […]
For SOC side, we cant' assume every mainboard usage and we will tender to leave the option open and decided by mainboard or OEM/ODM. If want to talk about a little history, one of the first workaround for nvidia bump crack was to keep processor running as slow as possible at the bios stage ......
Yes, I will add the enum here.
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