1 comment:
File src/soc/intel/cannonlake/fsp_params.c:
params->Enable8254ClockGating = config->clock_gate_8254;
params->Enable8254ClockGatingOnS3 = config->clock_gate_8254;
Default value for both Enable8254ClockGating and Enable8254ClockGatingOnS3 is 1. With this change, it will be set to clock_gate_8254 which defaults to 0 and I don't see any coreboot mainboard setting it. IIUC, that can result in S0ix failures because of the change in UPD values. Any board that is using CNL should first set clock_gate_8254 before this change goes in.
To view, visit change 31534. To unsubscribe, or for help writing mail filters, visit settings.